From patchwork Fri Sep 22 14:59:54 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 114040 Delivered-To: patches@linaro.org Received: by 10.140.106.117 with SMTP id d108csp3394842qgf; Fri, 22 Sep 2017 07:59:35 -0700 (PDT) X-Google-Smtp-Source: AOwi7QDLXP5r/Xtq4GBUJXpXfPyBHc4u04c6nKpYzS8St3irAiLp/6EhTOrcrnEiN5xE4PYJbXhJ X-Received: by 10.28.105.12 with SMTP id e12mr3956957wmc.29.1506092375136; Fri, 22 Sep 2017 07:59:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1506092375; cv=none; d=google.com; s=arc-20160816; b=cLfTmukmy002xMdiyhJLl8B/rjo9NgC8HSZo5CCRAmDewiaUAjPKVgndgmpBLolsO/ 8RRONZb8LJvx3RefIDVO00hkyONVTyQv8cx0ULfd4uY2qwrbZlhh+b583azojuT2c9FJ p+ul1BNSCas55lRbTXwD/CYf9001OEF8IswlNJSUj1CpARMSN0YphKOm6FJEG1C5cISa UzMii4GyXpIGd2wEzhlpFQwx+GT0Hm7GCqMm3kSrjk0ZnMAsSJ4YQEfhiAHmWdwawHJ9 ntTo1hRdoUEz2uir4Dg5Alaw7eZxeok0VpXjP6+4Is1MvQN5DQNIjWgCVfFX+trlX6XS Tgdg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=1XB2bZM6McpwLcdJ/J1b0+QQ1qmOnpqQ8EyA3JE5xOA=; b=nelU92PpHph3kIFSOo4ADwlNuLI5vQRtZqGjEW50gv0P0JpNYSn/Qwh0olco4NITlD K1L0Cc2HTTf57OfJLYTsc1nSXVZHDmrEYEI2JNQD0s92oPU8mb1tMtYbu/Dg4TCLQCos Tm+V46lwOYGwEK2M+8ThfVKSns4H7lQs13lgP5OPnB/9oUc9JvqgGFeN3Qpxbg3Rx/79 usNvk25xM/Xfz6IMm/YdvxmPhgUbUC0xMV8QCw4f4oHBT8+JSxPBO7C+ZIFS5u+5SEal WfeeTltf+w2kJTxQKpgXteClitqNmYSakdGqV4r6V4N9EL0FwrBnUPZsx9J2jiZHOI1D wteg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id u111si14428wrc.361.2017.09.22.07.59.34 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 22 Sep 2017 07:59:35 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1dvPQU-0007AY-IF; Fri, 22 Sep 2017 15:59:34 +0100 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: patches@linaro.org Subject: [PATCH 07/20] target/arm: Warn about restoring to unaligned stack Date: Fri, 22 Sep 2017 15:59:54 +0100 Message-Id: <1506092407-26985-8-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1506092407-26985-1-git-send-email-peter.maydell@linaro.org> References: <1506092407-26985-1-git-send-email-peter.maydell@linaro.org> Attempting to do an exception return with an exception frame that is not 8-aligned is UNPREDICTABLE in v8M; warn about this. (It is not UNPREDICTABLE in v7M, and our implementation can handle the merely-4-aligned case fine, so we don't need to do anything except warn.) Signed-off-by: Peter Maydell --- target/arm/helper.c | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.7.4 Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson diff --git a/target/arm/helper.c b/target/arm/helper.c index a2e46fb..979129e 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6403,6 +6403,13 @@ static void do_v7m_exception_exit(ARMCPU *cpu) return_to_sp_process); uint32_t frameptr = *frame_sp_p; + if (!QEMU_IS_ALIGNED(frameptr, 8) && + arm_feature(env, ARM_FEATURE_V8)) { + qemu_log_mask(LOG_GUEST_ERROR, + "M profile exception return with non-8-aligned SP " + "for destination state is UNPREDICTABLE\n"); + } + /* Pop registers. TODO: make these accesses use the correct * attributes and address space (S/NS, priv/unpriv) and handle * memory transaction failures.