From patchwork Mon Oct 9 13:48:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 115231 Delivered-To: patches@linaro.org Received: by 10.80.163.170 with SMTP id s39csp2401562edb; Mon, 9 Oct 2017 06:48:40 -0700 (PDT) X-Google-Smtp-Source: AOwi7QDF1DyDq5OWIf14h+7ymW0oyFx0ZqUOoj+pgDIPxerWJXy9M3ErbvZFGxkRA/2aub5H0rHJ X-Received: by 10.223.176.70 with SMTP id g6mr10583402wra.1.1507556920253; Mon, 09 Oct 2017 06:48:40 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1507556920; cv=none; d=google.com; s=arc-20160816; b=CZFNoCbVI/3Whm6q+ybSfrgzKEUoAzywFlGxgTJFrit77aE6Ge3qpGg93tTUrVWgH3 T+yiJgKE70vwBDh71TAF6K9zUNFaWVSfYEgOeLefAcvC3eIwlBQ2j+qtTh04HUrEeYfn nyZFj5v1keM/A396O6qi0vzpes4T38Fi/gP04IHpIrj77kTECqvDJiOxK7X1wylHI+cM 3Biq08Wclp5dHTEWMoYjqkfUtNdRoQMGSL3RW+e0fG7avwCkeZtlemFgywhQ4XvynJyT h5SoCJMlXWWpBHm50tGQB+yt9nzHv75VBXjfyZDsZyiWQ9ZO/gCJbcnMdBd9nF8fOE5m pdNg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=Qs9Mwb9RgNKEmO5MBIOJUrybtGWUJwYhs35qW+fajDk=; b=lH/5BDg9JZfRrtihvHL1/n3FASryQ98Zd9TAkQSlhcp3MFf2z63uIyzUWms2xTpBnO TbZLR4F+IOtp3COmJ4vZbghAlJSlEBoWj4tEaoFrXeWjWFvdi8vId8H/eacNBtSieJfO C33Mpxk4l/s7/TfAjUMzSygQITQuSUnWKjfk6+e9BeG4OZVud0Ne9O8mEv7QGmQXIvZn 4bZw01nvZbE99jCIOgrt1nSjLfOiEDppksbbzMWBlsRSK9TUnZOD8TYWgl9rgBfTQXxL wmkMpQ1uaz2iLrTatgl07R/JPx38EW1FAvVQureE1EofaZcWzzqlCLBlYRggUDzshPfv OqUw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id t66si6814722wme.78.2017.10.09.06.48.40 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 09 Oct 2017 06:48:40 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1e1YQA-0004WU-Rs; Mon, 09 Oct 2017 14:48:38 +0100 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: Richard Henderson , patches@linaro.org Subject: [PATCH 1/9] target/arm: Add M profile secure MMU index values to get_a32_user_mem_index() Date: Mon, 9 Oct 2017 14:48:31 +0100 Message-Id: <1507556919-24992-2-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507556919-24992-1-git-send-email-peter.maydell@linaro.org> References: <1507556919-24992-1-git-send-email-peter.maydell@linaro.org> Add the M profile secure MMU index values to the switch in get_a32_user_mem_index() so that LDRT/STRT work correctly rather than asserting at translate time. Signed-off-by: Peter Maydell --- target/arm/translate.c | 4 ++++ 1 file changed, 4 insertions(+) -- 2.7.4 Reviewed-by: Richard Henderson diff --git a/target/arm/translate.c b/target/arm/translate.c index ab1a12a..e1b83b7 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -165,6 +165,10 @@ static inline int get_a32_user_mem_index(DisasContext *s) case ARMMMUIdx_MPriv: case ARMMMUIdx_MNegPri: return arm_to_core_mmu_idx(ARMMMUIdx_MUser); + case ARMMMUIdx_MSUser: + case ARMMMUIdx_MSPriv: + case ARMMMUIdx_MSNegPri: + return arm_to_core_mmu_idx(ARMMMUIdx_MSUser); case ARMMMUIdx_S2NS: default: g_assert_not_reached();