From patchwork Fri Nov 3 18:13:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 117957 Delivered-To: patches@linaro.org Received: by 10.80.245.45 with SMTP id t42csp4752edm; Fri, 3 Nov 2017 11:13:05 -0700 (PDT) X-Google-Smtp-Source: ABhQp+SFNtt3VVbthtvVokCZW/x6B1F6YBpndKD2fmhjSFytk00Cd8njsKhTtk0CueAvomxys7pM X-Received: by 10.28.144.140 with SMTP id s134mr562860wmd.82.1509732785659; Fri, 03 Nov 2017 11:13:05 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1509732785; cv=none; d=google.com; s=arc-20160816; b=MGdEEbqI33FIxIfdJeadygNhv6jYyJLtYUPmB6yPcZ5PreuEnCqYMsBJ8p4n90XJhe zKYuo6yQt9lL/pNOtAPCUHr7aYFYe0OwLA2VN29iUuoLsPtpfWPIvruxCPyfYaQjSRYx axgQKVlWVkdAbYqGSsRRulN4cvxoXcRX9aI9gUMy+ZzJIiFE4SHiUGbjtPQnj+eD9121 yKxTKpHcVnr0BTXJpbvqIa9VpFFIOtUiI26+n7ghwC7Omu3+smLRE2B3zaBZbyc3eUBJ oFcMfNotYZ9saq5Or7DMc3TPAbrRomxxjnxwbMui/H4mMVtoYDlqPM3uqDLBKVsZrg2Q MwSQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=message-id:date:subject:cc:to:from:arc-authentication-results; bh=utVzXj62nawxjBGop6kRmvl0DDBGSdvhykAAt3XDWbk=; b=H7/x4bTYGjtm+wRlOquPOShB+W+u3JAML4t01SVvjgmwIK9WU2lbjWrc9tXBLUEWKr giA9N2dPQod5YtMHLXsTY/9PhpVczxMooj33BLO8H+R1ej3eBDiDyDjmnKFh1xt1HRzj mgxeKlcpAqpZRbEUHkGGOKdIiGCwrEQcqD8Sg1TMokq7OeSGxumBx6qz0CBzG1+Er3Pr IUsEReg8qPadwM/2mPkf0suWV3FE5c2PcoS5Q00YH1EjHEQJNeooZbzyPji9ozNcCIvG UKwGQRDSxQM5TfBpKD1c92275ISn/JJQ3lYx310Fcmny2UTKhOm7MPM6eLhpnVy1wUbc yYMw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id a5si5602742wrh.3.2017.11.03.11.13.05 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 03 Nov 2017 11:13:05 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1eAgSl-0005GX-Mj; Fri, 03 Nov 2017 18:13:03 +0000 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: patches@linaro.org Subject: [PATCH] nvic: Fix ARMv7M MPU_RBAR reads Date: Fri, 3 Nov 2017 18:13:33 +0000 Message-Id: <1509732813-22957-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 Fix an incorrect mask expression in the handling of v7M MPU_RBAR reads that meant that we would always report the ADDR field as zero. Signed-off-by: Peter Maydell --- Doesn't affect v8M, which is a different codepath. hw/intc/armv7m_nvic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.7.4 Reviewed-by: Alex Bennée diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index be46639..5d9c883 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -977,7 +977,7 @@ static uint32_t nvic_readl(NVICState *s, uint32_t offset, MemTxAttrs attrs) if (region >= cpu->pmsav7_dregion) { return 0; } - return (cpu->env.pmsav7.drbar[region] & 0x1f) | (region & 0xf); + return (cpu->env.pmsav7.drbar[region] & ~0x1f) | (region & 0xf); } case 0xda0: /* MPU_RASR (v7M), MPU_RLAR (v8M) */ case 0xda8: /* MPU_RASR_A1 (v7M), MPU_RLAR_A1 (v8M) */