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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id x2si452452ybk.270.2017.12.13.10.57.05 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 13 Dec 2017 10:57:05 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:37070 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ePCDI-0007oQ-OD for patch@linaro.org; Wed, 13 Dec 2017 13:57:04 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51883) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ePBWr-00053b-RU for qemu-devel@nongnu.org; Wed, 13 Dec 2017 13:13:14 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ePBWq-0008Fj-TG for qemu-devel@nongnu.org; Wed, 13 Dec 2017 13:13:13 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:39156) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ePBWq-0008Dn-N3 for qemu-devel@nongnu.org; Wed, 13 Dec 2017 13:13:12 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ePBWp-0007r7-Hb for qemu-devel@nongnu.org; Wed, 13 Dec 2017 18:13:11 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Wed, 13 Dec 2017 18:12:39 +0000 Message-Id: <1513188761-20784-42-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1513188761-20784-1-git-send-email-peter.maydell@linaro.org> References: <1513188761-20784-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 41/43] xilinx_spips: Update the QSPI Mod ID reset value X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Alistair Francis Update the reset value to match the latest ZynqMP register spec. Signed-off-by: Alistair Francis Reviewed-by: KONRAD Frederic Reviewed-by: Francisco Iglesias Message-id: c03e51d041db7f055596084891aeb1e856e32b9f.1513104804.git.alistair.francis@xilinx.com Signed-off-by: Peter Maydell --- hw/ssi/xilinx_spips.c | 1 + 1 file changed, 1 insertion(+) -- 2.7.4 diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index ad1b2ba..899db81 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -355,6 +355,7 @@ static void xlnx_zynqmp_qspips_reset(DeviceState *d) s->regs[R_GQSPI_RX_THRESH] = 1; s->regs[R_GQSPI_GFIFO_THRESH] = 1; s->regs[R_GQSPI_IMR] = GQSPI_IXR_MASK; + s->regs[R_MOD_ID] = 0x01090101; s->man_start_com_g = false; s->gqspi_irqline = 0; xlnx_zynqmp_qspips_update_ixr(s);