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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id 190si804886ybt.427.2018.01.25.05.59.05 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 25 Jan 2018 05:59:06 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41693 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eei3V-0006VK-9m for patch@linaro.org; Thu, 25 Jan 2018 08:59:05 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33731) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eehoi-0003H5-Hk for qemu-devel@nongnu.org; Thu, 25 Jan 2018 08:43:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eehoh-0003AY-JM for qemu-devel@nongnu.org; Thu, 25 Jan 2018 08:43:48 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45990) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eehoh-00038r-B5 for qemu-devel@nongnu.org; Thu, 25 Jan 2018 08:43:47 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1eehof-0006wU-O9 for qemu-devel@nongnu.org; Thu, 25 Jan 2018 13:43:45 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Thu, 25 Jan 2018 13:43:24 +0000 Message-Id: <1516887809-6265-17-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516887809-6265-1-git-send-email-peter.maydell@linaro.org> References: <1516887809-6265-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 16/21] hw/intc/arm_gic: Fix group priority computation for group 1 IRQs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Luc MICHEL When determining the group priority of a group 1 IRQ, if C_CTRL.CBPR is 0, the non-secure BPR value is used. However, this value must be incremented by one so that it matches the secure world number of implemented priority bits (NS world has one less priority bit compared to the Secure world). Signed-off-by: Luc MICHEL Message-id: 20180119145756.7629-5-luc.michel@greensocs.com Reviewed-by: Peter Maydell [PMM: add assert, as the gicv3 code has] Signed-off-by: Peter Maydell --- hw/intc/arm_gic.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 713de30..b7989d2 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -256,7 +256,8 @@ static int gic_get_group_priority(GICState *s, int cpu, int irq) if (gic_has_groups(s) && !(s->cpu_ctlr[cpu] & GICC_CTLR_CBPR) && GIC_TEST_GROUP(irq, (1 << cpu))) { - bpr = s->abpr[cpu]; + bpr = s->abpr[cpu] - 1; + assert(bpr >= 0); } else { bpr = s->bpr[cpu]; }