From patchwork Thu Jan 25 13:43:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 125834 Delivered-To: patch@linaro.org Received: by 10.46.66.141 with SMTP id h13csp1122804ljf; Thu, 25 Jan 2018 05:46:43 -0800 (PST) X-Google-Smtp-Source: AH8x224q6Qfn4FgXP2fsxPt096HozekEChy3XfQYBMSxNL17T37zvuY7VxGdIUU4UIPzERJXzkfI X-Received: by 10.129.80.8 with SMTP id e8mr8408964ywb.304.1516888003396; Thu, 25 Jan 2018 05:46:43 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516888003; cv=none; d=google.com; s=arc-20160816; b=o0XFLVWFnXgJ4mb4E2sfdgVmJWCv/z6pqBdO1TJWD/DZm8EH+8TedUrQOoVnrzPLu6 Qcp1iibTPg28KMRT7O5sRF6C4fXcb02l5Un245odd/40WBDVDjoLRn8FobyhpuDCS+lS do1JldFC3J0+F76AC4LQuInButAfqyOs/key/g7S+2iArqN95eiFrjrSwGU+coow/4Ly 0NzVD3d/ug5mqE15VZKWbJuduIIeugUG0tN3BI4j+R5bUWfx8GF//PgQVS9HAfQSu7W9 MmiZpCWqua59wa2+rP5KQpl5gJz//jgAvKvq3lt7YA0rmd+K9HTunjv/pKCCn+wEJxMo lLvg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:arc-authentication-results; bh=BwO6Q+V/0O1bLw72F01cEdmNQ24valyGuNhl85pj15c=; b=scL9I91pla6oHBuA3LRYOL8nXg1KkGMUl1jY+na6NDESbgzzg9hLd9ofhyx4LwjIP1 D+Q4S3NgeO7ifVQ6wqd1mlzZqogHGortvCpnKQ2zzbgLecQwifiLP28EPlZwOj+b0fcA 2IJ9wz4fX6R7E6l0+WaQqZb2OZCt/kRBtXieh8A+I9b/HwfTTT9DVJfQH9vUepyAcVa6 aMrBMMtY5il5ux9Bz66ju81ODMRQ+usHuSg3vdtsxYi5+pHZmRJD48QL/EPI95tTXkAw BGQwOQI5y4xkNULAeaeikc+6q86nnQgFjO7UeW7y2ieZhk4MU0ihSGfwOtp229+qk1rP nYIQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id o185si476044ywb.552.2018.01.25.05.46.43 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 25 Jan 2018 05:46:43 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:41382 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eehrW-0004T5-NS for patch@linaro.org; Thu, 25 Jan 2018 08:46:42 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33592) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eehoc-0003BL-9D for qemu-devel@nongnu.org; Thu, 25 Jan 2018 08:43:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eehob-00035Q-As for qemu-devel@nongnu.org; Thu, 25 Jan 2018 08:43:42 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45984) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eehob-00033y-1s for qemu-devel@nongnu.org; Thu, 25 Jan 2018 08:43:41 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1eehoV-0006ro-Tu for qemu-devel@nongnu.org; Thu, 25 Jan 2018 13:43:35 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Thu, 25 Jan 2018 13:43:14 +0000 Message-Id: <1516887809-6265-7-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516887809-6265-1-git-send-email-peter.maydell@linaro.org> References: <1516887809-6265-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 06/21] target/arm: Use pointers in neon tbl helper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson Rather than passing a regno to the helper, pass pointers to the vector register directly. This eliminates the need to pass in the environment pointer and reduces the number of places that directly access env->vfp.regs[]. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20180119045438.28582-5-richard.henderson@linaro.org Reviewed-by: Alex Bennée Signed-off-by: Peter Maydell --- target/arm/helper.h | 2 +- target/arm/op_helper.c | 17 +++++++---------- target/arm/translate.c | 8 ++++---- 3 files changed, 12 insertions(+), 15 deletions(-) -- 2.7.4 diff --git a/target/arm/helper.h b/target/arm/helper.h index dbdc38f..5dec2e6 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -188,7 +188,7 @@ DEF_HELPER_FLAGS_2(rsqrte_f32, TCG_CALL_NO_RWG, f32, f32, ptr) DEF_HELPER_FLAGS_2(rsqrte_f64, TCG_CALL_NO_RWG, f64, f64, ptr) DEF_HELPER_2(recpe_u32, i32, i32, ptr) DEF_HELPER_FLAGS_2(rsqrte_u32, TCG_CALL_NO_RWG, i32, i32, ptr) -DEF_HELPER_5(neon_tbl, i32, env, i32, i32, i32, i32) +DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i32, i32, i32, ptr, i32) DEF_HELPER_3(shl_cc, i32, env, i32, i32) DEF_HELPER_3(shr_cc, i32, env, i32, i32) diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index 712c5c5..a937e76 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -54,20 +54,17 @@ static int exception_target_el(CPUARMState *env) return target_el; } -uint32_t HELPER(neon_tbl)(CPUARMState *env, uint32_t ireg, uint32_t def, - uint32_t rn, uint32_t maxindex) +uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def, void *vn, + uint32_t maxindex) { - uint32_t val; - uint32_t tmp; - int index; - int shift; - uint64_t *table; - table = (uint64_t *)&env->vfp.regs[rn]; + uint32_t val, shift; + uint64_t *table = vn; + val = 0; for (shift = 0; shift < 32; shift += 8) { - index = (ireg >> shift) & 0xff; + uint32_t index = (ireg >> shift) & 0xff; if (index < maxindex) { - tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff; + uint32_t tmp = (table[index >> 3] >> ((index & 7) << 3)) & 0xff; val |= tmp << shift; } else { val |= def & (0xff << shift); diff --git a/target/arm/translate.c b/target/arm/translate.c index 6f02c56..852d2a7 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7544,9 +7544,9 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) tcg_gen_movi_i32(tmp, 0); } tmp2 = neon_load_reg(rm, 0); - tmp4 = tcg_const_i32(rn); + ptr1 = vfp_reg_ptr(true, rn); tmp5 = tcg_const_i32(n); - gen_helper_neon_tbl(tmp2, cpu_env, tmp2, tmp, tmp4, tmp5); + gen_helper_neon_tbl(tmp2, tmp2, tmp, ptr1, tmp5); tcg_temp_free_i32(tmp); if (insn & (1 << 6)) { tmp = neon_load_reg(rd, 1); @@ -7555,9 +7555,9 @@ static int disas_neon_data_insn(DisasContext *s, uint32_t insn) tcg_gen_movi_i32(tmp, 0); } tmp3 = neon_load_reg(rm, 1); - gen_helper_neon_tbl(tmp3, cpu_env, tmp3, tmp, tmp4, tmp5); + gen_helper_neon_tbl(tmp3, tmp3, tmp, ptr1, tmp5); tcg_temp_free_i32(tmp5); - tcg_temp_free_i32(tmp4); + tcg_temp_free_ptr(ptr1); neon_store_reg(rd, 0, tmp2); neon_store_reg(rd, 1, tmp3); tcg_temp_free_i32(tmp);