diff mbox series

[v7,04/11] target/arm: Don't set INSN_ARM_BE32 for CONFIG_USER_ONLY

Message ID 20171022004621.28372-5-richard.henderson@linaro.org
State Superseded
Headers show
Series Support the Capstone disassembler | expand

Commit Message

Richard Henderson Oct. 22, 2017, 12:46 a.m. UTC
This matches translator behaviour in arm_lduw_code.

Fixes: https://bugs.launchpad.net/qemu/+bug/1724485
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/cpu.c | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

-- 
2.13.6

Comments

Philippe Mathieu-Daudé Oct. 25, 2017, 1:27 p.m. UTC | #1
Hi Richard,

On 10/21/2017 09:46 PM, Richard Henderson wrote:
> This matches translator behaviour in arm_lduw_code.

> 

> Fixes: https://bugs.launchpad.net/qemu/+bug/1724485

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

> ---

>  target/arm/cpu.c | 9 +++++++--

>  1 file changed, 7 insertions(+), 2 deletions(-)

> 

> diff --git a/target/arm/cpu.c b/target/arm/cpu.c

> index 82dad0b721..a92d86faa0 100644

> --- a/target/arm/cpu.c

> +++ b/target/arm/cpu.c

> @@ -477,6 +477,7 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)

>  {

>      ARMCPU *ac = ARM_CPU(cpu);

>      CPUARMState *env = &ac->env;

> +    bool sctlr_b;

>  

>      if (is_a64(env)) {

>          /* We might not be compiled with the A64 disassembler

> @@ -491,7 +492,9 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)

>      } else {

>          info->print_insn = print_insn_arm;

>      }

> -    if (bswap_code(arm_sctlr_b(env))) {

> +

> +    sctlr_b = arm_sctlr_b(env);

> +    if (bswap_code(sctlr_b)) {

>  #ifdef TARGET_WORDS_BIGENDIAN

>          info->endian = BFD_ENDIAN_LITTLE;

>  #else

> @@ -499,9 +502,11 @@ static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)

>  #endif

>      }

>      info->flags &= ~INSN_ARM_BE32;

> -    if (arm_sctlr_b(env)) {

> +#ifndef CONFIG_USER_ONLY

> +    if (sctlr_b) {


Even though I could test the whole series, I couldn't hand-test this
particular case yet.

Not a big deal anyway ;)

>          info->flags |= INSN_ARM_BE32;

>      }

> +#endif

>  }
diff mbox series

Patch

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 82dad0b721..a92d86faa0 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -477,6 +477,7 @@  static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)
 {
     ARMCPU *ac = ARM_CPU(cpu);
     CPUARMState *env = &ac->env;
+    bool sctlr_b;
 
     if (is_a64(env)) {
         /* We might not be compiled with the A64 disassembler
@@ -491,7 +492,9 @@  static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)
     } else {
         info->print_insn = print_insn_arm;
     }
-    if (bswap_code(arm_sctlr_b(env))) {
+
+    sctlr_b = arm_sctlr_b(env);
+    if (bswap_code(sctlr_b)) {
 #ifdef TARGET_WORDS_BIGENDIAN
         info->endian = BFD_ENDIAN_LITTLE;
 #else
@@ -499,9 +502,11 @@  static void arm_disas_set_info(CPUState *cpu, disassemble_info *info)
 #endif
     }
     info->flags &= ~INSN_ARM_BE32;
-    if (arm_sctlr_b(env)) {
+#ifndef CONFIG_USER_ONLY
+    if (sctlr_b) {
         info->flags |= INSN_ARM_BE32;
     }
+#endif
 }
 
 uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz)