From patchwork Wed Oct 25 09:35:13 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 117065 Delivered-To: patch@linaro.org Received: by 10.140.22.164 with SMTP id 33csp645350qgn; Wed, 25 Oct 2017 02:51:14 -0700 (PDT) X-Google-Smtp-Source: ABhQp+TupdLK2Y67B7gyP/b69rKG9c8B5YsixLzfvRU13nxrXW6LDV0XuZla0ellJHTeat4QjKVJ X-Received: by 10.129.210.4 with SMTP id x4mr12419460ywi.101.1508925074123; Wed, 25 Oct 2017 02:51:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1508925074; cv=none; d=google.com; s=arc-20160816; b=zylLynPoyyWPSNaG1FPxfyFWlTNsMIpkA5mTbdW71AgP/PJg53X/7dl6F5Rcq5Xfg2 NYVKMTh/KXqUxoXZaeHHllC7FDABenrbbu1tRfNRJ1P5PTrlxfOT+4y7lcqAJSre1wFB Gmg92mXAmuCXxOFTNb81ZYy+J6XNOfUp9SuEkepekPSSnAnxDK5SmKE/DFZrfdFgCuu3 It9zIG5nKJQnsaphPh+Z4BxAEGx03jAp0Hyj9GqMs+s0kkpdLe3Q574uxMcGG7QNyn9s ml3/xqR9eRcaurv0JEWMDsIEURlv0GD6pShJ94oiIozsFI79nSLotaaY2ksGBLy8fP1g 2ZwA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=b2CHv8ZbWwK/h/iHEPhOUtRtKbpIkwlFvDhfeRmqI70=; b=YhgeNKQad5lULwhAT6l5UEIEv0GtjLlPPzhfbFTFewaDRyUYqsLAB0o/0P3vVb/YP+ ljvRpHIs6J8oi6M1viMe+3IpOUOMEM2hksBzJV0x9Ggy2zoegRZVpnYxe0ESOJMFDWB+ Px5fAupf4S5wXVrhvZVpGLVutz1jOSL5sYu0HqcrI5JV5wUMhypsxWLYvBxY3T/oAUAe uSQrVbJs/U7tlmj7mCyTY3mGVIm6JRSyiNXkwnAsw5fNunkdUtT5EBeZl14O6YT+3Xdj NUGnsKUwjLRE1A1Pyr3yuPpK8M9mq+MXlKNg5ejrqz4H+PVxU7uY1dUGQZsdn/WU9rPW FMRw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=LylV+snH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id t12si367971ybk.583.2017.10.25.02.51.14 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 25 Oct 2017 02:51:14 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=LylV+snH; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:47371 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e7ILB-0004SF-H0 for patch@linaro.org; Wed, 25 Oct 2017 05:51:13 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45836) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e7I6m-00005B-DN for qemu-devel@nongnu.org; Wed, 25 Oct 2017 05:36:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e7I6i-0008Pe-BF for qemu-devel@nongnu.org; Wed, 25 Oct 2017 05:36:20 -0400 Received: from mail-wm0-x243.google.com ([2a00:1450:400c:c09::243]:46388) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1e7I6i-0008Og-1i for qemu-devel@nongnu.org; Wed, 25 Oct 2017 05:36:16 -0400 Received: by mail-wm0-x243.google.com with SMTP id m72so633037wmc.1 for ; Wed, 25 Oct 2017 02:36:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=b2CHv8ZbWwK/h/iHEPhOUtRtKbpIkwlFvDhfeRmqI70=; b=LylV+snHck8J8QeWlh5E756bfV4mHVxZbxL6BfVQEv3bqHaUDA6PnQz4yhPX6sEkfO eMKErojD29B2Gopi94lv7vgGAe2WChHrhRqIFjIB/LJL5bvRMXN9jxFExn53shKBhBA4 Y+VQWV67ff8f1D1xiP9DEOHfmUgVWmO8AjDKE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=b2CHv8ZbWwK/h/iHEPhOUtRtKbpIkwlFvDhfeRmqI70=; b=dWFSOYJpCXMKvTKScK6edOgG/ScPn3HrQNYvEhJgwJe6c8uHpJa5RXJb4lv82qUDJ2 UFoP2v40JtJ0mqYtry6Kp55UiIwe7sDFS6zY7zmAEXhdxeCoVm4KnHd03z3dAdxHg9bA MO7ozvgBdX5nKV8QcO2o1kyPC1QomGOAkp31OhwCXQj1WrB411HtD3b13Z6oFabzjkA1 lc74An4sKsA/OqGE4/cPmhQHKwpt0c/LGQ1HTsWiawPn3K/Ga6P80m9UiugQkdMmkMk1 vdVxSKkNPOyMHYBy0BytvNdTCNwD2/+GsisvMHtXVjCIoQuMXaLM8pyFl+ytFMtHgvbs dNzw== X-Gm-Message-State: AMCzsaW5zjq3igE9hf2eZxlu5P67kMFQszldxWGdpc9SJqp5pfhqBxXe aosCeh7ObmAS7z22QIbbMymBtFNDf4E= X-Received: by 10.28.234.197 with SMTP id g66mr1075601wmi.76.1508924174811; Wed, 25 Oct 2017 02:36:14 -0700 (PDT) Received: from cloudburst.twiddle.net ([62.168.35.107]) by smtp.gmail.com with ESMTPSA id v23sm2751025wmh.8.2017.10.25.02.36.13 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 25 Oct 2017 02:36:14 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 25 Oct 2017 11:35:13 +0200 Message-Id: <20171025093535.10175-30-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171025093535.10175-1-richard.henderson@linaro.org> References: <20171025093535.10175-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::243 Subject: [Qemu-devel] [PULL 29/51] target/m68k: check CF_PARALLEL instead of parallel_cpus X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, "Emilio G. Cota" Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: "Emilio G. Cota" Thereby decoupling the resulting translated code from the current state of the system. Reviewed-by: Richard Henderson Signed-off-by: Emilio G. Cota Signed-off-by: Richard Henderson --- target/m68k/helper.h | 1 + target/m68k/op_helper.c | 33 ++++++++++++++++++++------------- target/m68k/translate.c | 12 ++++++++++-- 3 files changed, 31 insertions(+), 15 deletions(-) -- 2.13.6 diff --git a/target/m68k/helper.h b/target/m68k/helper.h index 475a1f2186..eebe52dae5 100644 --- a/target/m68k/helper.h +++ b/target/m68k/helper.h @@ -11,6 +11,7 @@ DEF_HELPER_2(set_sr, void, env, i32) DEF_HELPER_3(movec, void, env, i32, i32) DEF_HELPER_4(cas2w, void, env, i32, i32, i32) DEF_HELPER_4(cas2l, void, env, i32, i32, i32) +DEF_HELPER_4(cas2l_parallel, void, env, i32, i32, i32) #define dh_alias_fp ptr #define dh_ctype_fp FPReg * diff --git a/target/m68k/op_helper.c b/target/m68k/op_helper.c index 7b5126c88d..63089511cb 100644 --- a/target/m68k/op_helper.c +++ b/target/m68k/op_helper.c @@ -361,6 +361,7 @@ void HELPER(divsll)(CPUM68KState *env, int numr, int regr, int32_t den) env->dregs[numr] = quot; } +/* We're executing in a serial context -- no need to be atomic. */ void HELPER(cas2w)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2) { uint32_t Dc1 = extract32(regs, 9, 3); @@ -374,17 +375,11 @@ void HELPER(cas2w)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2) int16_t l1, l2; uintptr_t ra = GETPC(); - if (parallel_cpus) { - /* Tell the main loop we need to serialize this insn. */ - cpu_loop_exit_atomic(ENV_GET_CPU(env), ra); - } else { - /* We're executing in a serial context -- no need to be atomic. */ - l1 = cpu_lduw_data_ra(env, a1, ra); - l2 = cpu_lduw_data_ra(env, a2, ra); - if (l1 == c1 && l2 == c2) { - cpu_stw_data_ra(env, a1, u1, ra); - cpu_stw_data_ra(env, a2, u2, ra); - } + l1 = cpu_lduw_data_ra(env, a1, ra); + l2 = cpu_lduw_data_ra(env, a2, ra); + if (l1 == c1 && l2 == c2) { + cpu_stw_data_ra(env, a1, u1, ra); + cpu_stw_data_ra(env, a2, u2, ra); } if (c1 != l1) { @@ -399,7 +394,8 @@ void HELPER(cas2w)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2) env->dregs[Dc2] = deposit32(env->dregs[Dc2], 0, 16, l2); } -void HELPER(cas2l)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2) +static void do_cas2l(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2, + bool parallel) { uint32_t Dc1 = extract32(regs, 9, 3); uint32_t Dc2 = extract32(regs, 6, 3); @@ -416,7 +412,7 @@ void HELPER(cas2l)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2) TCGMemOpIdx oi; #endif - if (parallel_cpus) { + if (parallel) { /* We're executing in a parallel context -- must be atomic. */ #ifdef CONFIG_ATOMIC64 uint64_t c, u, l; @@ -470,6 +466,17 @@ void HELPER(cas2l)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2) env->dregs[Dc2] = l2; } +void HELPER(cas2l)(CPUM68KState *env, uint32_t regs, uint32_t a1, uint32_t a2) +{ + do_cas2l(env, regs, a1, a2, false); +} + +void HELPER(cas2l_parallel)(CPUM68KState *env, uint32_t regs, uint32_t a1, + uint32_t a2) +{ + do_cas2l(env, regs, a1, a2, true); +} + struct bf_data { uint32_t addr; uint32_t bofs; diff --git a/target/m68k/translate.c b/target/m68k/translate.c index fdc26268d0..d751faed7c 100644 --- a/target/m68k/translate.c +++ b/target/m68k/translate.c @@ -2312,7 +2312,11 @@ DISAS_INSN(cas2w) (REG(ext1, 6) << 3) | (REG(ext2, 0) << 6) | (REG(ext1, 0) << 9)); - gen_helper_cas2w(cpu_env, regs, addr1, addr2); + if (tb_cflags(s->tb) & CF_PARALLEL) { + gen_helper_exit_atomic(cpu_env); + } else { + gen_helper_cas2w(cpu_env, regs, addr1, addr2); + } tcg_temp_free(regs); /* Note that cas2w also assigned to env->cc_op. */ @@ -2358,7 +2362,11 @@ DISAS_INSN(cas2l) (REG(ext1, 6) << 3) | (REG(ext2, 0) << 6) | (REG(ext1, 0) << 9)); - gen_helper_cas2l(cpu_env, regs, addr1, addr2); + if (tb_cflags(s->tb) & CF_PARALLEL) { + gen_helper_cas2l_parallel(cpu_env, regs, addr1, addr2); + } else { + gen_helper_cas2l(cpu_env, regs, addr1, addr2); + } tcg_temp_free(regs); /* Note that cas2l also assigned to env->cc_op. */