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[37.10.242.18]) by smtp.gmail.com with ESMTPSA id 29sm21828608wrz.77.2017.11.15.04.37.25 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 15 Nov 2017 04:37:25 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 15 Nov 2017 13:35:19 +0100 Message-Id: <20171115123520.7464-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20171115123520.7464-1-richard.henderson@linaro.org> References: <20171115123520.7464-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::244 Subject: [Qemu-devel] [PULL for-2.11 2/3] target/arm: Use helper_retaddr in stxp helpers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We use raw memory primitives along the !parallel_cpus paths in order to simplify the endianness handling. Because of that, we did not benefit from the generic changes to cpu_ldst_user_only_template.h. The simplest fix is to manipulate helper_retaddr here. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/helper-a64.c | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.13.6 diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index d0e435ca4b..96a3ecf707 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -456,6 +456,8 @@ static uint64_t do_paired_cmpxchg64_le(CPUARMState *env, uint64_t addr, #ifdef CONFIG_USER_ONLY /* ??? Enforce alignment. */ uint64_t *haddr = g2h(addr); + + helper_retaddr = ra; o0 = ldq_le_p(haddr + 0); o1 = ldq_le_p(haddr + 1); oldv = int128_make128(o0, o1); @@ -465,6 +467,7 @@ static uint64_t do_paired_cmpxchg64_le(CPUARMState *env, uint64_t addr, stq_le_p(haddr + 0, int128_getlo(newv)); stq_le_p(haddr + 1, int128_gethi(newv)); } + helper_retaddr = 0; #else int mem_idx = cpu_mmu_index(env, false); TCGMemOpIdx oi0 = make_memop_idx(MO_LEQ | MO_ALIGN_16, mem_idx); @@ -523,6 +526,8 @@ static uint64_t do_paired_cmpxchg64_be(CPUARMState *env, uint64_t addr, #ifdef CONFIG_USER_ONLY /* ??? Enforce alignment. */ uint64_t *haddr = g2h(addr); + + helper_retaddr = ra; o1 = ldq_be_p(haddr + 0); o0 = ldq_be_p(haddr + 1); oldv = int128_make128(o0, o1); @@ -532,6 +537,7 @@ static uint64_t do_paired_cmpxchg64_be(CPUARMState *env, uint64_t addr, stq_be_p(haddr + 0, int128_gethi(newv)); stq_be_p(haddr + 1, int128_getlo(newv)); } + helper_retaddr = 0; #else int mem_idx = cpu_mmu_index(env, false); TCGMemOpIdx oi0 = make_memop_idx(MO_BEQ | MO_ALIGN_16, mem_idx);