From patchwork Wed Jan 24 23:25:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 125721 Delivered-To: patch@linaro.org Received: by 10.46.66.141 with SMTP id h13csp732328ljf; Wed, 24 Jan 2018 15:30:09 -0800 (PST) X-Google-Smtp-Source: AH8x2275SG+3tve5c8D6KvKrK93Mxd6KQ8tavdNLLcCVqLbb9oKiA+hl5ZoIw3zSDNRMaWGfAaeo X-Received: by 10.129.41.81 with SMTP id p78mr6860954ywp.368.1516836609862; Wed, 24 Jan 2018 15:30:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1516836609; cv=none; d=google.com; s=arc-20160816; b=bpWxxn833tyTWcBioJb2+4YpfcZDcUMJnSj9mZUij0zmkoOEEp+Ggg5IAlpZdrSKnS DQG2UUpN0zM6D0ahZBMp4DJGMgLHl3FarT2+LB8gOqIdF1cjIHsAV8KhQcyyvMV52K4n 0mTUCqiQW4tUK1zNLiW3S00Ex/ucy7IXoi5nf0p/zsFATeOHxUd8pocjUMr5/u64PJOD j3wJNkZ6h1rIevx2LmYwEflSlVoqH+X2RkxMPSoYYDprhW3puOYPnAjgm3FChDWMLjVP XRypTPBKrAUoWzWO1b5EAGKU1jSe8IuFfBzEgqOLm1sN2R/9ML3TelOCBquLcVzWRBVw GkAg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature:arc-authentication-results; bh=d85lqCspBYOiEahvyujgf0zWY50v14bxlk08GHck46o=; b=xAAF5FCD9IyVvQ5umiMAUeNAfQZMetohXSVIe8r9GxJlEOhHfbBlwNU4MidTAruBex tAN4hwPvEkw0zlH7/4OKrFDJi1i5AauP5oeDw5Wzp0LWo6OtWssDFCLEQFiwCA3V8H41 Tk4P7IQ+KbdiWOZT7wvZ7tkqhecx5+oA5bguPd5ll3ElC2afj539A0mkE7fz17a1wg5c JlgNDcsUEtE08xFI+GWj5H/p7NG0GJ1k/AXx+QhvavLFGk5W9O3RU+LjeIvYiLZ/ZSxU 6aZ67FxhVVaNcR6VjWaSuQUiqXFnQX4xhGgoDVIBFEUUlDTun1EDzL5nE4SAtqfaZugU esHw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=iLpRfCLh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id f138si2981808yba.670.2018.01.24.15.30.09 for (version=TLS1 cipher=AES128-SHA bits=128/128); Wed, 24 Jan 2018 15:30:09 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=iLpRfCLh; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom=qemu-devel-bounces+patch=linaro.org@nongnu.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:54465 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eeUUb-00071k-7N for patch@linaro.org; Wed, 24 Jan 2018 18:30:09 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50933) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eeURB-0004NK-8m for qemu-devel@nongnu.org; Wed, 24 Jan 2018 18:26:38 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eeUR9-0001c0-Pm for qemu-devel@nongnu.org; Wed, 24 Jan 2018 18:26:37 -0500 Received: from mail-pg0-x242.google.com ([2607:f8b0:400e:c05::242]:43924) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1eeUR9-0001bl-Hb for qemu-devel@nongnu.org; Wed, 24 Jan 2018 18:26:35 -0500 Received: by mail-pg0-x242.google.com with SMTP id n17so3805415pgf.10 for ; Wed, 24 Jan 2018 15:26:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references; bh=d85lqCspBYOiEahvyujgf0zWY50v14bxlk08GHck46o=; b=iLpRfCLhPOqcd1J/kwcgQfP5A2CT6miHVl7CbePfkxEWjdrq1Iq477MT5NLJOf3yL6 veLBRImlKKK94BOR34R2MAZYMW96mS1ZNfEUzixM7gOLUlbUPJJ2X6AB1xrpgGERBTMO G+gRU0WReX4EiOQKaAI6iu8vAzLK4JH7rf+hU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references; bh=d85lqCspBYOiEahvyujgf0zWY50v14bxlk08GHck46o=; b=r6LE8I4LMsNohupqZyvqCS6T53WtyUT88jfDwDfuf0Us1yk/sh/wBIAf+oaXX1IxuQ bWoUMq7aovfDsolH27ksZaEntFcV83NZZakz/rLZnGiONwPJ2EJ7+6yEAlRQJ2CFrLLy EKXu/9s7pfr9CGvDiFYeind49l5LZEXnKceehTW/08UUuHmDSaYX31ql4E6Ek02zDus0 atwsZ2qxt1/ok1HRr/0kglKdLDzVSwgwDhH9QrfDbaHkFLEqUoR7MDMYdZxmHw0ZCYyH 9+5RhbyPgjXw8gDIDobZnQPznHmaxVJ7O3Z5hvMAlxISkTtLleLmSgeCN5IgQFFYg/0Q agsg== X-Gm-Message-State: AKwxytfSNO9KPHkfW19QQ7oQTh4sNKFrSlkOUpyeG2aIlkU5M/W97mUr phaJokWg9FApZLqyGh4ypFuwSJ0/DjQ= X-Received: by 2002:a17:902:b7cb:: with SMTP id v11-v6mr9513420plz.393.1516836394094; Wed, 24 Jan 2018 15:26:34 -0800 (PST) Received: from cloudburst.twiddle.net (174-21-6-47.tukw.qwest.net. [174.21.6.47]) by smtp.gmail.com with ESMTPSA id z19sm9760028pfh.185.2018.01.24.15.26.32 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 24 Jan 2018 15:26:33 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Wed, 24 Jan 2018 15:25:44 -0800 Message-Id: <20180124232625.30105-5-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180124232625.30105-1-richard.henderson@linaro.org> References: <20180124232625.30105-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::242 Subject: [Qemu-devel] [PATCH v3 04/45] target/hppa: Define hardware exception types X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/hppa/cpu.h | 39 +++++++++++++++++++++++++++---- linux-user/main.c | 26 ++++++++++++++++++--- target/hppa/helper.c | 61 ++++++++++++++++++++++++++++++++++-------------- target/hppa/mem_helper.c | 4 +++- target/hppa/op_helper.c | 6 ++--- target/hppa/translate.c | 8 +++---- 6 files changed, 111 insertions(+), 33 deletions(-) -- 2.14.3 diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index ea7e495408..d84af91860 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -40,11 +40,40 @@ #define MMU_USER_IDX 0 #define TARGET_INSN_START_EXTRA_WORDS 1 -#define EXCP_SYSCALL 1 -#define EXCP_SYSCALL_LWS 2 -#define EXCP_SIGSEGV 3 -#define EXCP_SIGILL 4 -#define EXCP_SIGFPE 5 +/* Hardware exceptions, interupts, faults, and traps. */ +#define EXCP_HPMC 1 /* high priority machine check */ +#define EXCP_POWER_FAIL 2 +#define EXCP_RC 3 /* recovery counter */ +#define EXCP_EXT_INTERRUPT 4 /* external interrupt */ +#define EXCP_LPMC 5 /* low priority machine check */ +#define EXCP_ITLB_MISS 6 /* itlb miss / instruction page fault */ +#define EXCP_IMP 7 /* instruction memory protection trap */ +#define EXCP_ILL 8 /* illegal instruction trap */ +#define EXCP_BREAK 9 /* break instruction */ +#define EXCP_PRIV_OPR 10 /* privileged operation trap */ +#define EXCP_PRIV_REG 11 /* privileged register trap */ +#define EXCP_OVERFLOW 12 /* signed overflow trap */ +#define EXCP_COND 13 /* trap-on-condition */ +#define EXCP_ASSIST 14 /* assist exception trap */ +#define EXCP_DTLB_MISS 15 /* dtlb miss / data page fault */ +#define EXCP_NA_ITLB_MISS 16 /* non-access itlb miss */ +#define EXCP_NA_DTLB_MISS 17 /* non-access dtlb miss */ +#define EXCP_DMP 18 /* data memory protection trap */ +#define EXCP_DMB 19 /* data memory break trap */ +#define EXCP_TLB_DIRTY 20 /* tlb dirty bit trap */ +#define EXCP_PAGE_REF 21 /* page reference trap */ +#define EXCP_ASSIST_EMU 22 /* assist emulation trap */ +#define EXCP_HPT 23 /* high-privilege transfer trap */ +#define EXCP_LPT 24 /* low-privilege transfer trap */ +#define EXCP_TB 25 /* taken branch trap */ +#define EXCP_DMAR 26 /* data memory access rights trap */ +#define EXCP_DMPI 27 /* data memory protection id trap */ +#define EXCP_UNALIGN 28 /* unaligned data reference trap */ +#define EXCP_PER_INTERRUPT 29 /* performance monitor interrupt */ + +/* Exceptions for linux-user emulation. */ +#define EXCP_SYSCALL 30 +#define EXCP_SYSCALL_LWS 31 /* Taken from Linux kernel: arch/parisc/include/asm/psw.h */ #define PSW_I 0x00000001 diff --git a/linux-user/main.c b/linux-user/main.c index 450eb3ce65..42f4c66ce6 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -3768,21 +3768,41 @@ void cpu_loop(CPUHPPAState *env) env->iaoq_f = env->gr[31]; env->iaoq_b = env->gr[31] + 4; break; - case EXCP_SIGSEGV: + case EXCP_ITLB_MISS: + case EXCP_DTLB_MISS: + case EXCP_NA_ITLB_MISS: + case EXCP_NA_DTLB_MISS: + case EXCP_IMP: + case EXCP_DMP: + case EXCP_DMB: + case EXCP_PAGE_REF: + case EXCP_DMAR: + case EXCP_DMPI: info.si_signo = TARGET_SIGSEGV; info.si_errno = 0; info.si_code = TARGET_SEGV_ACCERR; info._sifields._sigfault._addr = env->ior; queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); break; - case EXCP_SIGILL: + case EXCP_UNALIGN: + info.si_signo = TARGET_SIGBUS; + info.si_errno = 0; + info.si_code = 0; + info._sifields._sigfault._addr = env->ior; + queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); + break; + case EXCP_ILL: + case EXCP_PRIV_OPR: + case EXCP_PRIV_REG: info.si_signo = TARGET_SIGILL; info.si_errno = 0; info.si_code = TARGET_ILL_ILLOPN; info._sifields._sigfault._addr = env->iaoq_f; queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); break; - case EXCP_SIGFPE: + case EXCP_OVERFLOW: + case EXCP_COND: + case EXCP_ASSIST: info.si_signo = TARGET_SIGFPE; info.si_errno = 0; info.si_code = 0; diff --git a/target/hppa/helper.c b/target/hppa/helper.c index 4231ef3bff..6439179a0e 100644 --- a/target/hppa/helper.c +++ b/target/hppa/helper.c @@ -74,25 +74,52 @@ void hppa_cpu_do_interrupt(CPUState *cs) int i = cs->exception_index; if (qemu_loglevel_mask(CPU_LOG_INT)) { + static const char * const names[] = { + [EXCP_HPMC] = "high priority machine check", + [EXCP_POWER_FAIL] = "power fail interrupt", + [EXCP_RC] = "recovery counter trap", + [EXCP_EXT_INTERRUPT] = "external interrupt", + [EXCP_LPMC] = "low priority machine check", + [EXCP_ITLB_MISS] = "instruction tlb miss fault", + [EXCP_IMP] = "instruction memory protection trap", + [EXCP_ILL] = "illegal instruction trap", + [EXCP_BREAK] = "break instruction trap", + [EXCP_PRIV_OPR] = "privileged operation trap", + [EXCP_PRIV_REG] = "privileged register trap", + [EXCP_OVERFLOW] = "overflow trap", + [EXCP_COND] = "conditional trap", + [EXCP_ASSIST] = "assist exception trap", + [EXCP_DTLB_MISS] = "data tlb miss fault", + [EXCP_NA_ITLB_MISS] = "non-access instruction tlb miss", + [EXCP_NA_DTLB_MISS] = "non-access data tlb miss", + [EXCP_DMP] = "data memory protection trap", + [EXCP_DMB] = "data memory break trap", + [EXCP_TLB_DIRTY] = "tlb dirty bit trap", + [EXCP_PAGE_REF] = "page reference trap", + [EXCP_ASSIST_EMU] = "assist emulation trap", + [EXCP_HPT] = "high-privilege transfer trap", + [EXCP_LPT] = "low-privilege transfer trap", + [EXCP_TB] = "taken branch trap", + [EXCP_DMAR] = "data memory access rights trap", + [EXCP_DMPI] = "data memory protection id trap", + [EXCP_UNALIGN] = "unaligned data reference trap", + [EXCP_PER_INTERRUPT] = "performance monitor interrupt", + [EXCP_SYSCALL] = "syscall", + [EXCP_SYSCALL_LWS] = "syscall-lws", + }; static int count; - const char *name = ""; - - switch (i) { - case EXCP_SYSCALL: - name = "syscall"; - break; - case EXCP_SIGSEGV: - name = "sigsegv"; - break; - case EXCP_SIGILL: - name = "sigill"; - break; - case EXCP_SIGFPE: - name = "sigfpe"; - break; + const char *name = NULL; + + if (i >= 0 && i < ARRAY_SIZE(names)) { + name = names[i]; + } + if (name) { + qemu_log("INT %6d: %s ia_f=" TARGET_FMT_lx "\n", + ++count, name, env->iaoq_f); + } else { + qemu_log("INT %6d: unknown %d ia_f=" TARGET_FMT_lx "\n", + ++count, i, env->iaoq_f); } - qemu_log("INT %6d: %s ia_f=" TARGET_FMT_lx "\n", - ++count, name, env->iaoq_f); } cs->exception_index = -1; } diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c index e0802bc935..2901f3e29c 100644 --- a/target/hppa/mem_helper.c +++ b/target/hppa/mem_helper.c @@ -29,7 +29,9 @@ int hppa_cpu_handle_mmu_fault(CPUState *cs, vaddr address, { HPPACPU *cpu = HPPA_CPU(cs); - cs->exception_index = EXCP_SIGSEGV; + /* ??? Test between data page fault and data memory protection trap, + which would affect si_code. */ + cs->exception_index = EXCP_DMP; cpu->env.ior = address; return 1; } diff --git a/target/hppa/op_helper.c b/target/hppa/op_helper.c index 9c7603588f..d6b86834c1 100644 --- a/target/hppa/op_helper.c +++ b/target/hppa/op_helper.c @@ -44,14 +44,14 @@ static void QEMU_NORETURN dynexcp(CPUHPPAState *env, int excp, uintptr_t ra) void HELPER(tsv)(CPUHPPAState *env, target_ulong cond) { if (unlikely((target_long)cond < 0)) { - dynexcp(env, EXCP_SIGFPE, GETPC()); + dynexcp(env, EXCP_OVERFLOW, GETPC()); } } void HELPER(tcond)(CPUHPPAState *env, target_ulong cond) { if (unlikely(cond)) { - dynexcp(env, EXCP_SIGFPE, GETPC()); + dynexcp(env, EXCP_COND, GETPC()); } } @@ -235,7 +235,7 @@ static void update_fr0_op(CPUHPPAState *env, uintptr_t ra) env->fr[0] = (uint64_t)shadow << 32; if (hard_exp & shadow) { - dynexcp(env, EXCP_SIGFPE, ra); + dynexcp(env, EXCP_ASSIST, ra); } } diff --git a/target/hppa/translate.c b/target/hppa/translate.c index 8e357cc60c..8d85ed9df3 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -462,7 +462,7 @@ static DisasJumpType gen_excp(DisasContext *ctx, int exception) static DisasJumpType gen_illegal(DisasContext *ctx) { nullify_over(ctx); - return nullify_end(ctx, gen_excp(ctx, EXCP_SIGILL)); + return nullify_end(ctx, gen_excp(ctx, EXCP_ILL)); } static bool use_goto_tb(DisasContext *ctx, target_ulong dest) @@ -1578,7 +1578,7 @@ static DisasJumpType do_page_zero(DisasContext *ctx) switch (ctx->iaoq_f) { case 0x00: /* Null pointer call */ - gen_excp_1(EXCP_SIGSEGV); + gen_excp_1(EXCP_IMP); return DISAS_NORETURN; case 0xb0: /* LWS */ @@ -1597,7 +1597,7 @@ static DisasJumpType do_page_zero(DisasContext *ctx) default: do_sigill: - gen_excp_1(EXCP_SIGILL); + gen_excp_1(EXCP_ILL); return DISAS_NORETURN; } } @@ -1614,7 +1614,7 @@ static DisasJumpType trans_break(DisasContext *ctx, uint32_t insn, const DisasInsn *di) { nullify_over(ctx); - return nullify_end(ctx, gen_excp(ctx, EXCP_DEBUG)); + return nullify_end(ctx, gen_excp(ctx, EXCP_BREAK)); } static DisasJumpType trans_sync(DisasContext *ctx, uint32_t insn,