Message ID | 20180227143852.11175-4-alex.bennee@linaro.org |
---|---|
State | Superseded |
Headers | show
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X-Received-From: 2a00:1450:400c:c09::242 Subject: [Qemu-devel] [PATCH v4 03/31] target/arm/cpu.h: update comment for half-precision values X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel/> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Cc: =?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org>, richard.henderson@linaro.org, qemu-devel@nongnu.org, Peter Maydell <peter.maydell@linaro.org> Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+patch=linaro.org@nongnu.org> |
Series |
Add ARMv8.2 half-precision functions
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expand
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diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 267a9d7e2f..25f31a4e21 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -168,6 +168,7 @@ typedef struct { * Qn = regs[n].d[1]:regs[n].d[0] * Dn = regs[n].d[0] * Sn = regs[n].d[0] bits 31..0 + * Hn = regs[n].d[0] bits 15..0 * * This corresponds to the architecturally defined mapping between * the two execution states, and means we do not need to explicitly