diff mbox series

[PULL,15/16] sdcard: Correct CRC16 offset in sd_function_switch()

Message ID 20180515140707.15957-16-peter.maydell@linaro.org
State Accepted
Commit f6fb1f9b319feac09119848d206b07640ddd39e7
Headers show
Series target-arm queue | expand

Commit Message

Peter Maydell May 15, 2018, 2:07 p.m. UTC 
From: Philippe Mathieu-Daudé <f4bug@amsat.org>


Per the Physical Layer Simplified Spec. "4.3.10.4 Switch Function Status":

  The block length is predefined to 512 bits

and "4.10.2 SD Status":

  The SD Status contains status bits that are related to the SD Memory Card
  proprietary features and may be used for future application-specific usage.
  The size of the SD Status is one data block of 512 bit. The content of this
  register is transmitted to the Host over the DAT bus along with a 16-bit CRC.

Thus the 16-bit CRC goes at offset 64.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

Message-id: 20180509060104.4458-3-f4bug@amsat.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
 hw/sd/sd.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

-- 
2.17.0
diff mbox series

Patch

diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index 235e0518d6..7af19fa06c 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -787,7 +787,7 @@  static void sd_function_switch(SDState *sd, uint32_t arg)
         sd->data[14 + (i >> 1)] = new_func << ((i * 4) & 4);
     }
     memset(&sd->data[17], 0, 47);
-    stw_be_p(sd->data + 65, sd_crc16(sd->data, 64));
+    stw_be_p(sd->data + 64, sd_crc16(sd->data, 64));
 }
 
 static inline bool sd_wp_addr(SDState *sd, uint64_t addr)