From patchwork Thu Aug 9 13:01:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 143851 Delivered-To: patches@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp2065926ljj; Thu, 9 Aug 2018 06:01:28 -0700 (PDT) X-Google-Smtp-Source: AA+uWPwsHGOp7mpWjk3s3bjbypjv7qpcQYtUX6bS8WbKxtCpgPlio1Ij7MsH7jgvIjJA4ghUsF6N X-Received: by 2002:a1c:b49:: with SMTP id 70-v6mr1652642wml.149.1533819688859; Thu, 09 Aug 2018 06:01:28 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533819688; cv=none; d=google.com; s=arc-20160816; b=UY9WsOLnYfc4PSmVBrwITIz6JYf32233+jH1hfFvDchVwn333YPhTZ8R5EoNw0+TXF jHCRibw+/bZtSMVjPP4xE86OC8ZfDCG7+Sq0mp1Ks0Mcy9RUKiFkTOLpxhiTwFiggIpc TT5evwKE/J0hUiJPFqRxEEiJwQBOjoui/VX/Zba9SDCKXIvlZV8agiI/l4wZzzolY9yo ISDyralkXvZUU7Sz8yR1LjdnM5hm5Tg9SrqerjzACYgHSm/DQg5P5x8Wf2XBoz0+qkX0 Lcmii4CmxyEvdl+eGg0SotEVFNJxWLOfsrrn/CZXZWNoiC1quEAAMrYDGqL6lbylkybD JBew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :arc-authentication-results; bh=kobDFngLI/XKlBst3pxRV5FTylo4OQ8HKEVp/5oGXWM=; b=ZasIG6fBLD1IQWN8cIWSxHvnpOmA5DRimaLsHaMG6AvsPIyIxsTfV5dt8iZFVJKUOy 6jaj4ZUM+ZEXIIWZ1+DXTxP7DhUDaw1UrCY5xwQDU9U+u2O7F9gnCFLaOjBj+SJtpcn9 eqKgr9ge3B/rEaypHkqnZlTEfTZEc9b2Tw1Va0PL+6QYB0xBPcYVKLMHN4tG9d3N2Idk 92oehgEov8YhhnJT10VGs2n8gf+mIQwUeY0PlUzt7FaGCDD01sNgOF64k75JaLUgULY2 7MYqF9SQnk+N+VWcippOHDBt/qyGnQ4Az0zZ1BxM1HuanmdWJWZu2fBtIUwJUwi0RByB ph4w== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id 197-v6si5493723wme.98.2018.08.09.06.01.28 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 09 Aug 2018 06:01:28 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fnkZE-0003J5-DM; Thu, 09 Aug 2018 14:01:28 +0100 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Cc: patches@linaro.org Subject: [PATCH 10/16] hw/dma/pl080: Allow use as embedded-struct device Date: Thu, 9 Aug 2018 14:01:09 +0100 Message-Id: <20180809130115.28951-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180809130115.28951-1-peter.maydell@linaro.org> References: <20180809130115.28951-1-peter.maydell@linaro.org> Create a new include file for the pl081's device struct, type macros, etc, so that it can be instantiated using the "embedded struct" coding style. Signed-off-by: Peter Maydell --- include/hw/dma/pl080.h | 62 ++++++++++++++++++++++++++++++++++++++++++ hw/dma/pl080.c | 34 ++--------------------- MAINTAINERS | 1 + 3 files changed, 65 insertions(+), 32 deletions(-) create mode 100644 include/hw/dma/pl080.h -- 2.17.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/include/hw/dma/pl080.h b/include/hw/dma/pl080.h new file mode 100644 index 00000000000..7deb46c8578 --- /dev/null +++ b/include/hw/dma/pl080.h @@ -0,0 +1,62 @@ +/* + * ARM PrimeCell PL080/PL081 DMA controller + * + * Copyright (c) 2006 CodeSourcery. + * Copyright (c) 2018 Linaro Limited + * Written by Paul Brook, Peter Maydell + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 or + * (at your option) any later version. + */ + +/* This is a model of the Arm PrimeCell PL080/PL081 DMA controller: + * The PL080 TRM is: + * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0196g/DDI0196.pdf + * and the PL081 TRM is: + * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0218e/DDI0218.pdf + * + * QEMU interface: + * + sysbus IRQ: DMACINTR combined interrupt line + * + sysbus MMIO region 0: MemoryRegion for the device's registers + */ + +#ifndef HW_DMA_PL080_H +#define HW_DMA_PL080_H + +#include "hw/sysbus.h" + +#define PL080_MAX_CHANNELS 8 + +typedef struct { + uint32_t src; + uint32_t dest; + uint32_t lli; + uint32_t ctrl; + uint32_t conf; +} pl080_channel; + +#define TYPE_PL080 "pl080" +#define TYPE_PL081 "pl081" +#define PL080(obj) OBJECT_CHECK(PL080State, (obj), TYPE_PL080) + +typedef struct PL080State { + SysBusDevice parent_obj; + + MemoryRegion iomem; + uint8_t tc_int; + uint8_t tc_mask; + uint8_t err_int; + uint8_t err_mask; + uint32_t conf; + uint32_t sync; + uint32_t req_single; + uint32_t req_burst; + pl080_channel chan[PL080_MAX_CHANNELS]; + int nchannels; + /* Flag to avoid recursive DMA invocations. */ + int running; + qemu_irq irq; +} PL080State; + +#endif diff --git a/hw/dma/pl080.c b/hw/dma/pl080.c index 7724c93b8f2..0f79c2d8a6c 100644 --- a/hw/dma/pl080.c +++ b/hw/dma/pl080.c @@ -11,8 +11,8 @@ #include "hw/sysbus.h" #include "exec/address-spaces.h" #include "qemu/log.h" +#include "hw/dma/pl080.h" -#define PL080_MAX_CHANNELS 8 #define PL080_CONF_E 0x1 #define PL080_CONF_M1 0x2 #define PL080_CONF_M2 0x4 @@ -30,36 +30,6 @@ #define PL080_CCTRL_D 0x02000000 #define PL080_CCTRL_S 0x01000000 -typedef struct { - uint32_t src; - uint32_t dest; - uint32_t lli; - uint32_t ctrl; - uint32_t conf; -} pl080_channel; - -#define TYPE_PL080 "pl080" -#define PL080(obj) OBJECT_CHECK(PL080State, (obj), TYPE_PL080) - -typedef struct PL080State { - SysBusDevice parent_obj; - - MemoryRegion iomem; - uint8_t tc_int; - uint8_t tc_mask; - uint8_t err_int; - uint8_t err_mask; - uint32_t conf; - uint32_t sync; - uint32_t req_single; - uint32_t req_burst; - pl080_channel chan[PL080_MAX_CHANNELS]; - int nchannels; - /* Flag to avoid recursive DMA invocations. */ - int running; - qemu_irq irq; -} PL080State; - static const VMStateDescription vmstate_pl080_channel = { .name = "pl080_channel", .version_id = 1, @@ -408,7 +378,7 @@ static const TypeInfo pl080_info = { }; static const TypeInfo pl081_info = { - .name = "pl081", + .name = TYPE_PL081, .parent = TYPE_PL080, .instance_init = pl081_init, }; diff --git a/MAINTAINERS b/MAINTAINERS index 5d1a3645dd4..92ccca716c6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -444,6 +444,7 @@ F: hw/char/pl011.c F: include/hw/char/pl011.h F: hw/display/pl110* F: hw/dma/pl080.c +F: include/hw/dma/pl080.h F: hw/dma/pl330.c F: hw/gpio/pl061.c F: hw/input/pl050.c