diff mbox series

[v2,4/9] target/arm: Fix cortex-a7 id_isar0

Message ID 20180927211322.16118-5-richard.henderson@linaro.org
State Superseded
Headers show
Series target/arm: Rely on id regs instead of features | expand

Commit Message

Richard Henderson Sept. 27, 2018, 9:13 p.m. UTC
The incorrect value advertised only thumb2 div without arm div.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

---
 target/arm/cpu.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

-- 
2.17.1

Comments

Philippe Mathieu-Daudé Sept. 28, 2018, 1:05 p.m. UTC | #1
On 27/09/2018 23:13, Richard Henderson wrote:
> The incorrect value advertised only thumb2 div without arm div.

> 

> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>


Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>


> ---

>  target/arm/cpu.c | 5 ++++-

>  1 file changed, 4 insertions(+), 1 deletion(-)

> 

> diff --git a/target/arm/cpu.c b/target/arm/cpu.c

> index 03bf28f533..020e79918b 100644

> --- a/target/arm/cpu.c

> +++ b/target/arm/cpu.c

> @@ -1587,7 +1587,10 @@ static void cortex_a7_initfn(Object *obj)

>      cpu->id_mmfr1 = 0x40000000;

>      cpu->id_mmfr2 = 0x01240000;

>      cpu->id_mmfr3 = 0x02102211;

> -    cpu->id_isar0 = 0x01101110;

> +    /* a7_mpcore_r0p5_trm, page 4-4 gives 0x01101110; but

> +     * table 4-41 gives 0x02101110, which includes the arm div insns.

> +     */

> +    cpu->id_isar0 = 0x02101110;

>      cpu->id_isar1 = 0x13112111;

>      cpu->id_isar2 = 0x21232041;

>      cpu->id_isar3 = 0x11112131;

>
diff mbox series

Patch

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 03bf28f533..020e79918b 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1587,7 +1587,10 @@  static void cortex_a7_initfn(Object *obj)
     cpu->id_mmfr1 = 0x40000000;
     cpu->id_mmfr2 = 0x01240000;
     cpu->id_mmfr3 = 0x02102211;
-    cpu->id_isar0 = 0x01101110;
+    /* a7_mpcore_r0p5_trm, page 4-4 gives 0x01101110; but
+     * table 4-41 gives 0x02101110, which includes the arm div insns.
+     */
+    cpu->id_isar0 = 0x02101110;
     cpu->id_isar1 = 0x13112111;
     cpu->id_isar2 = 0x21232041;
     cpu->id_isar3 = 0x11112131;