From patchwork Thu Nov 22 11:29:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 151747 Delivered-To: patches@linaro.org Received: by 2002:a2e:5d95:0:0:0:0:0 with SMTP id v21-v6csp609306lje; Thu, 22 Nov 2018 03:29:54 -0800 (PST) X-Google-Smtp-Source: AFSGD/VZVvYjHpuXNdHv4ejsRMrnBXoP2HapvGN+Qk7NGd7XuNz4ScPT6mb4lV8R1+1fCzvVldV0 X-Received: by 2002:a1c:1348:: with SMTP id 69mr9548113wmt.71.1542886194011; Thu, 22 Nov 2018 03:29:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542886194; cv=none; d=google.com; s=arc-20160816; b=qegQT8kiprc1cSkzJE2/qWkGDvNMcU6jDcvey6jzvPxGDWAGAxAd5ID9YnIhSYO8w7 vhxhvYvw5UNz6EDPR+IDkluG89fecdMUHYyyMS6vYq8Sd7vgJpCpi3QraX0NYCuVHDv9 s443vHLQ7JakmUh43wCON9L2cP1GLh6ElZ7ES+y8Reg2IOmvoYps/TUCzlfDrO4TQk8O Iooea8T8MJaymi+YeAItspIStuAZbktI5BiNcqLV9wFWDKi1qwBv0xFJ6EJ8kgagYtsb m/jGU5TakV4HfUPneuxC/gy5rG1W+3Ohngmkr98zfykJ0/RGAY/usLexchPHTf+ya4t1 I0RQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=8+AboRxgCmRMUowRWZIjFaBdp7zSLXt73VgjSbj0xlk=; b=ZioV36shQC2UlLPONG+1FJsx0B2YcdfxN6juXR9ZHu3fKsXK6nu/pwIoOkDsNtcpNa sDUfuiwzMoFL3dqamXJ8mfL3LL2Sdx8/TDfFrtyV2dWi90sGdsg/SFIvODv4UDp8Ruyd 0t9J030LiD1qoH41Bp5sa31plZDNc4bDsyt5eq/AOSgRHoZ9zhzDGs3QS/SL6xmdN2Lg JdsZh5bwbsRsBPpL/A9uuDaMeZWFy1pF/tkbXgX5m7mWC477PB2dEiZtS+gyRkAF0cVb BxXAixlMnOcPAXs/N6WF/LWOewA9UGizNG/S5spey/kG0XQBTdvHDDIsrMySJeJ20tvA ISIw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from orth.archaic.org.uk (orth.archaic.org.uk. [2001:8b0:1d0::2]) by mx.google.com with ESMTPS id y2-v6si3149113wmd.146.2018.11.22.03.29.53 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 22 Nov 2018 03:29:53 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) client-ip=2001:8b0:1d0::2; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of pm215@archaic.org.uk designates 2001:8b0:1d0::2 as permitted sender) smtp.mailfrom=pm215@archaic.org.uk; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1gPnBB-0004v4-CD; Thu, 22 Nov 2018 11:29:53 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Cc: patches@linaro.org, "Dr. David Alan Gilbert" , Markus Armbruster Subject: [PATCH for-4.0 2/3] monitor: Use address_space_read() to read memory Date: Thu, 22 Nov 2018 11:29:46 +0000 Message-Id: <20181122112947.7586-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181122112947.7586-1-peter.maydell@linaro.org> References: <20181122112947.7586-1-peter.maydell@linaro.org> MIME-Version: 1.0 Currently monitor.c reads physical memory using cpu_physical_memory_read(). This effectively hard-codes assuming that all CPUs have the same view of physical memory. Switch to address_space_read() instead, which lets us use the AddressSpace for the CPU we're reading memory for (falling back to address_space_memory if there is no CPU, as happens with the "none" board). As a bonus, this allows us to detect failures to read memory. Signed-off-by: Peter Maydell --- monitor.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) -- 2.19.1 Reviewed-by: Dr. David Alan Gilbert diff --git a/monitor.c b/monitor.c index d39390c2f2f..b0e8f2c490a 100644 --- a/monitor.c +++ b/monitor.c @@ -1604,7 +1604,13 @@ static void memory_dump(Monitor *mon, int count, int format, int wsize, if (l > line_size) l = line_size; if (is_physical) { - cpu_physical_memory_read(addr, buf, l); + AddressSpace *as = cs ? cs->as : &address_space_memory; + MemTxResult r = address_space_read(as, addr, + MEMTXATTRS_UNSPECIFIED, buf, l); + if (r != MEMTX_OK) { + monitor_printf(mon, " Cannot access memory\n"); + break; + } } else { if (cpu_memory_rw_debug(cs, addr, buf, l, 0) < 0) { monitor_printf(mon, " Cannot access memory\n");