From patchwork Fri Dec 7 10:36:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 153118 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp341201ljp; Fri, 7 Dec 2018 02:45:18 -0800 (PST) X-Google-Smtp-Source: AFSGD/XtiYc1T+yqwJO7RJ7LBRt988VSD3QHVe1BWUJfXX2ml6CRWfcN3qR8TqF7+iQuAwwQUxN+ X-Received: by 2002:ac8:748:: with SMTP id k8mr1425830qth.235.1544179518026; Fri, 07 Dec 2018 02:45:18 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544179518; cv=none; d=google.com; s=arc-20160816; b=AhryUIazVPqtB4nDAehEaFS02V247S+S8BK1uo1zYNjY//TrZm7CcY11w/EKHBQf+G 5SVW8FkmSN5YttoHlEOrwQHCZX254K1wUtnrhp7JFZ+DtgeZ9l/Mpy8VIhi+3CVDXICY vXq5hZYBrW05SX0wbK9LAPilMfv2fHm5eRTSTCv2TxKNJqCkx4YqZ8YUioWG29wOM5ma yBHs1L4vMLtiaxWGoivSKcFoxub1svbJ8j2TNB+kQ2BUTrz4TBhvTflhezsUMKFABiOR 29ducTIqgqUslUYQPEIaEtZSKoolFcsYEfEbB/okOzXUhS/8rUy6D2MMySu1hwZT4UeJ gstw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=AfTh8gW2nEerFBptIiL2FcF2skV4dBXghfB4MT/cLMY=; b=JDWLvVTk8wy22gbUwAuiCIiRThtkf/STa9HOvuX+oMcN4QcprxigIpLrxvtaLNKfmz 95Qt4QtT/A6spS1TCeUuizQOX+LbePMOKmLnCmcDepT8LtfIIM8rLGllzSCu4ZJrHr0U pd5Z8nleFY/hhj0i7ZIhn0Y9RQhFqcErDsz/1L4JHiCmfxFlSSKpfaPb2qAo0+ALvvFI 9sV+1sB89CRt9PRLCVWUe1bDXu01xvlu0lEToSUZfN4GOYjGYOORqDfHC1Ty9S3RCUxt ZL2XZIUtklIAsIfHNPqG/v6QScMFaDPYqkZ8Nc+1w2qJLiyTnwnpevXqx/OVC0gTPhJ3 1zvQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=eeF41a+6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id x2si2018418qta.285.2018.12.07.02.45.17 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 07 Dec 2018 02:45:18 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=eeF41a+6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:45299 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gVDdF-0002qs-D1 for patch@linaro.org; Fri, 07 Dec 2018 05:45:17 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59174) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gVDVA-00089n-16 for qemu-devel@nongnu.org; Fri, 07 Dec 2018 05:37:01 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gVDV9-0007ci-5Z for qemu-devel@nongnu.org; Fri, 07 Dec 2018 05:36:55 -0500 Received: from mail-ot1-x32d.google.com ([2607:f8b0:4864:20::32d]:43461) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gVDV9-0007c4-0b for qemu-devel@nongnu.org; Fri, 07 Dec 2018 05:36:55 -0500 Received: by mail-ot1-x32d.google.com with SMTP id a11so3336493otr.10 for ; Fri, 07 Dec 2018 02:36:54 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=AfTh8gW2nEerFBptIiL2FcF2skV4dBXghfB4MT/cLMY=; b=eeF41a+6TXDKzbtjI9TvMb/eMa7mRxLAQE2lvo9CoOTktVDEHn5H+mDl89OfgWotxU b5SSLmrW/QoZgF8owQLl/qFq/V8IN+VbF2EP12HZsK7/Taru6jzS5KOSzcF6j+KzrEE7 S3NdyEiVkff0W3gUz0cazfQabfgIQKBcvp5fE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=AfTh8gW2nEerFBptIiL2FcF2skV4dBXghfB4MT/cLMY=; b=U7IXaJ90SkUxGZtF91rh+yPrpB7BWvXqpknm9Nl+D+gUUrleboucfyjOABxb4vc2Nf IVXHzEYZBgU4Wp1IAOHTIU9NOcM5dqFC6WY2erfdPKghXd+vmpHjF4SB4vi1urH1GYxK wEFVZZ7kQSiESBq9J0X+Sfawdr1rsWD9gx5Pkk/5N7vq7BqoCGYX8J+3Mo4cHgfboxtr JVfM6z975bMf5cR75r0duB6BpFf1FdSzXI5y6vAyXBgdfNiMORmSC6Rca0je5WwhoFJJ 3usRrR9Xyk41rGeT+5sd8DLP3b0u4AdO9QmX+FFeGql1co9mNv9uZOdNaqkeIDCZWm0+ CRng== X-Gm-Message-State: AA+aEWZx6rmJjOCRxjfZPvikz4+2xV4gw6EAFn6Kr3okCrq51NmNSi+L fZLHYtnHLoFV/hHeUgbylyQ/JSzMzs8= X-Received: by 2002:a9d:88d:: with SMTP id 13mr976787otf.269.1544179014040; Fri, 07 Dec 2018 02:36:54 -0800 (PST) Received: from cloudburst.twiddle.net (172.189-204-159.bestel.com.mx. [189.204.159.172]) by smtp.gmail.com with ESMTPSA id c19sm2037594otl.16.2018.12.07.02.36.52 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 07 Dec 2018 02:36:53 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 7 Dec 2018 04:36:17 -0600 Message-Id: <20181207103631.28193-13-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181207103631.28193-1-richard.henderson@linaro.org> References: <20181207103631.28193-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::32d Subject: [Qemu-devel] [PATCH 12/26] target/arm: Decode PAuth within disas_uncond_b_reg X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, ramana.radhakrishnan@arm.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 100 +++++++++++++++++++++++++++++++++++-- 1 file changed, 95 insertions(+), 5 deletions(-) -- 2.17.2 diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 5fa2647771..d4df2b48b1 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -1982,6 +1982,7 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn) { unsigned int opc, op2, op3, rn, op4; TCGv_i64 dst; + TCGv_i64 modifier; opc = extract32(insn, 21, 4); op2 = extract32(insn, 16, 5); @@ -1997,9 +1998,47 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn) case 0: /* BR */ case 1: /* BLR */ case 2: /* RET */ - if (op3 == 0 && op4 == 0) { + switch (op3) { + case 0: + /* BR, BLR, RET */ + if (op4 != 0) { + goto do_unallocated; + } dst = cpu_reg(s, rn); - } else { + break; + + case 2: + case 3: + if (!dc_isar_feature(aa64_pauth, s)) { + goto do_unallocated; + } + if (opc == 2) { + /* RETAA, RETAB */ + if (rn != 0x1f || op4 != 0x1f) { + goto do_unallocated; + } + rn = 30; + modifier = cpu_X[31]; + } else { + /* BRAAZ, BRABZ, BLRAAZ, BLRABZ */ + if (op4 != 0x1f) { + goto do_unallocated; + } + modifier = new_tmp_a64_zero(s); + } + if (s->pauth_active) { + dst = new_tmp_a64(s); + if (op3 == 2) { + gen_helper_autia(dst, cpu_env, cpu_reg(s, rn), modifier); + } else { + gen_helper_autib(dst, cpu_env, cpu_reg(s, rn), modifier); + } + } else { + dst = cpu_reg(s, rn); + } + break; + + default: goto do_unallocated; } gen_a64_set_pc(s, dst); @@ -2009,6 +2048,32 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn) } break; + case 8: /* BRAA */ + case 9: /* BLRAA */ + if (!dc_isar_feature(aa64_pauth, s)) { + goto do_unallocated; + } + if (op3 != 2 || op3 != 3) { + goto do_unallocated; + } + if (s->pauth_active) { + dst = new_tmp_a64(s); + modifier = cpu_reg_sp(s, op4); + if (op3 == 2) { + gen_helper_autia(dst, cpu_env, cpu_reg(s, rn), modifier); + } else { + gen_helper_autib(dst, cpu_env, cpu_reg(s, rn), modifier); + } + } else { + dst = cpu_reg(s, rn); + } + gen_a64_set_pc(s, dst); + /* BLRAA also needs to load return address */ + if (opc == 9) { + tcg_gen_movi_i64(cpu_reg(s, 30), s->pc); + } + break; + case 4: /* ERET */ if (s->current_el == 0) { goto do_unallocated; @@ -2016,11 +2081,36 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn) dst = tcg_temp_new_i64(); tcg_gen_ld_i64(dst, cpu_env, offsetof(CPUARMState, elr_el[s->current_el])); - if (op3 == 0 && op4 == 0) { - ; - } else { + + switch (op3) { + case 0: /* ERET */ + if (op4 != 0) { + goto do_unallocated; + } + break; + + case 2: /* ERETAA */ + case 3: /* ERETAB */ + if (!dc_isar_feature(aa64_pauth, s)) { + goto do_unallocated; + } + if (rn != 0x1f || op4 != 0x1f) { + goto do_unallocated; + } + if (s->pauth_active) { + modifier = cpu_X[31]; + if (op3 == 2) { + gen_helper_autia(dst, cpu_env, dst, modifier); + } else { + gen_helper_autib(dst, cpu_env, dst, modifier); + } + } + break; + + default: goto do_unallocated; } + if (tb_cflags(s->base.tb) & CF_USE_ICOUNT) { gen_io_start(); }