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[2001:4830:134:3::11]) by mx.google.com with ESMTPS id b10si2235270qvt.55.2018.12.13.21.30.21 for (version=TLS1 cipher=AES128-SHA bits=128/128); Thu, 13 Dec 2018 21:30:21 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Xf3nTQc0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:59453 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXg3I-0000SX-PD for patch@linaro.org; Fri, 14 Dec 2018 00:30:20 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55668) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gXfxY-0004PG-Dj for qemu-devel@nongnu.org; Fri, 14 Dec 2018 00:24:27 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gXfxX-0005Lw-Dl for qemu-devel@nongnu.org; Fri, 14 Dec 2018 00:24:24 -0500 Received: from mail-ot1-x341.google.com ([2607:f8b0:4864:20::341]:44186) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gXfxX-0005Ks-6l for qemu-devel@nongnu.org; Fri, 14 Dec 2018 00:24:23 -0500 Received: by mail-ot1-x341.google.com with SMTP id f18so4281441otl.11 for ; Thu, 13 Dec 2018 21:24:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=xLK16dXcE1/3hAYx2nGnEtmWP589qVwfWbOpdPd0plw=; b=Xf3nTQc0H9HVcepn6LCmp1rYokJCRWCJFlb3hSk49XOxweD0Q2TYfjFpMOOJ034RQr Mg6VDBkXcNoN1ffI2r+YZ7AU6+x3VnVS0fBtoRwpqihyKxqPGpKLVSyBK5GkUAtaykfW erxEH034cRxM01xC/4uj7JCIcrFr9tkG+7v/A= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=xLK16dXcE1/3hAYx2nGnEtmWP589qVwfWbOpdPd0plw=; b=jb+cBAE9Fy2GSSTz0DOJ9HXzozjYG5VO//PVUXnAXhGVlBiKnmxwgf0anUPKB1KIM6 p9xmx3C8XQrJlb1kobaIousfnx5HCXJalHkGcEf/AmR3HYSo1IFKXC5meJEPqQV46m/R 9HAb45WlzE/NAKESyCptKDAw1K+nY+n11dU1PzcnOeR+tKuzAIAONO5NNGHgsHWJhICB TMJnp8LeQMtg0Yoak+c3sNkNSOEZtYzA7sqLdy9DQch+AOZmnS+ujbGK8aCQNQS9rxJI CZwgsmaU+U3cmM2kue0OdETt3DpI6dWoFKohVenNuCDQFt+R3YCFxCtNWiSGxNNzTOyM WAHQ== X-Gm-Message-State: AA+aEWbRdcRGwg4UhRfJIHUshok5RMhOT3HxIgwnvMkU8d7DDRnPKyhc Ssndh3WVluZRZfjf3i0EQJbq5KnpugBLQA== X-Received: by 2002:a9d:332:: with SMTP id 47mr1248190otv.260.1544765060305; Thu, 13 Dec 2018 21:24:20 -0800 (PST) Received: from cloudburst.twiddle.net ([187.217.227.243]) by smtp.gmail.com with ESMTPSA id r1sm1845379oti.44.2018.12.13.21.24.19 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 13 Dec 2018 21:24:19 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 13 Dec 2018 23:23:49 -0600 Message-Id: <20181214052410.11863-7-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181214052410.11863-1-richard.henderson@linaro.org> References: <20181214052410.11863-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::341 Subject: [Qemu-devel] [PATCH v2 06/27] target/arm: Rearrange decode in disas_data_proc_1src X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Now properly signals unallocated for REV64 with SF=0. Allows for the opcode2 field to be decoded shortly. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- target/arm/translate-a64.c | 31 ++++++++++++++++++++++--------- 1 file changed, 22 insertions(+), 9 deletions(-) -- 2.17.2 diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 0df344f9e8..c5ec430b42 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4563,38 +4563,51 @@ static void handle_rev16(DisasContext *s, unsigned int sf, */ static void disas_data_proc_1src(DisasContext *s, uint32_t insn) { - unsigned int sf, opcode, rn, rd; + unsigned int sf, opcode, opcode2, rn, rd; - if (extract32(insn, 29, 1) || extract32(insn, 16, 5)) { + if (extract32(insn, 29, 1)) { unallocated_encoding(s); return; } sf = extract32(insn, 31, 1); opcode = extract32(insn, 10, 6); + opcode2 = extract32(insn, 16, 5); rn = extract32(insn, 5, 5); rd = extract32(insn, 0, 5); - switch (opcode) { - case 0: /* RBIT */ +#define MAP(SF, O2, O1) ((SF) | (O1 << 1) | (O2 << 7)) + + switch (MAP(sf, opcode2, opcode)) { + case MAP(0, 0x00, 0x00): /* RBIT */ + case MAP(1, 0x00, 0x00): handle_rbit(s, sf, rn, rd); break; - case 1: /* REV16 */ + case MAP(0, 0x00, 0x01): /* REV16 */ + case MAP(1, 0x00, 0x01): handle_rev16(s, sf, rn, rd); break; - case 2: /* REV32 */ + case MAP(0, 0x00, 0x02): /* REV/REV32 */ + case MAP(1, 0x00, 0x02): handle_rev32(s, sf, rn, rd); break; - case 3: /* REV64 */ + case MAP(1, 0x00, 0x03): /* REV64 */ handle_rev64(s, sf, rn, rd); break; - case 4: /* CLZ */ + case MAP(0, 0x00, 0x04): /* CLZ */ + case MAP(1, 0x00, 0x04): handle_clz(s, sf, rn, rd); break; - case 5: /* CLS */ + case MAP(0, 0x00, 0x05): /* CLS */ + case MAP(1, 0x00, 0x05): handle_cls(s, sf, rn, rd); break; + default: + unallocated_encoding(s); + break; } + +#undef MAP } static void handle_div(DisasContext *s, bool is_signed, unsigned int sf,