From patchwork Mon Jan 14 11:56:36 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Maydell X-Patchwork-Id: 155457 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp3574279jaa; Mon, 14 Jan 2019 04:01:12 -0800 (PST) X-Google-Smtp-Source: ALg8bN6FNoR9ZlHGQlWQtoHbxjZhnvOJxcBc7akx+x69hxcNyhlz5ttnzt1U7W78Wvu8X9A5V9Ht X-Received: by 2002:a7b:c34c:: with SMTP id l12mr11393841wmj.147.1547467272580; Mon, 14 Jan 2019 04:01:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1547467272; cv=none; d=google.com; s=arc-20160816; b=AC7EiRzK/x3SFEYdXthsvPOMpOy0hJ/QPJE9M16uNWUp6L6y6p/hxTUoOeFphbu/tK LmhBtRFK1vDlc0AmWldRnxutYevmPwArBvNrkWTRAEySA8K4LWdv/uZfJYQJXj9hzfyU jIsgxwDVBAH9vPoFo+WExvPDXrAGSFDAwCCi/4teb0pZlStgN65kIbUxGan9J7GQ67P7 zq18Qs7OIt0ktCklnzXbPkFNxVkwZmEILc8bSeil7K4bONUtOrm9FbCLyV19wh9LV2MJ DluAG7d11OOQWX4vORZLQfq6/VYMrXfraYDu8EB3TlWgJO7JxmD+adlomwWw5WVKbHF8 lsqA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=oqRnIlXxwg2YvWcpXWnxVXBNj6TKwPF8KWOfQK0VbWs=; b=rhUwdiX8rqg+nn16/I6Un9yvfVw01dz+ppzKadWnoF/vxTlmkKgBOncSGuRODoGWds Kgu568H73BBzQs5/bUK+jlGb47oXMTW+ApcyzqVme08+OnOZSGU0JBKezgpRoVJv5s4T j8p7nWuS6NR9VdK09XYLUCT53PmmgwVnsyYS6Hrg1qhChm7XpQ/4RyzR6DC5V45sq56s yAnrR3leqXH2i/QtsUEM2r7uFw7jkGRQmE1Cp4PUgoBxGcE4IPaH+kdLqhD2VAulQAt6 Ma0P5gQhGuZLOpRSs+fkMQJaSDPAwDqtPvVTCcK2j7YfUTG+ioIP9q6DRU44bP6hgdjE axGw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=WFDQnSPK; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id m8si29471084wrx.128.2019.01.14.04.01.12 for (version=TLS1 cipher=AES128-SHA bits=128/128); Mon, 14 Jan 2019 04:01:12 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=WFDQnSPK; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1]:58561 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gj0vX-0001R8-Hk for patch@linaro.org; Mon, 14 Jan 2019 07:01:11 -0500 Received: from eggs.gnu.org ([209.51.188.92]:47209) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gj0rI-0006YC-MC for qemu-devel@nongnu.org; Mon, 14 Jan 2019 06:56:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gj0rH-0005s1-7C for qemu-devel@nongnu.org; Mon, 14 Jan 2019 06:56:48 -0500 Received: from mail-wm1-x343.google.com ([2a00:1450:4864:20::343]:37276) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gj0rH-0005qk-0K for qemu-devel@nongnu.org; Mon, 14 Jan 2019 06:56:47 -0500 Received: by mail-wm1-x343.google.com with SMTP id g67so8532022wmd.2 for ; Mon, 14 Jan 2019 03:56:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=oqRnIlXxwg2YvWcpXWnxVXBNj6TKwPF8KWOfQK0VbWs=; b=WFDQnSPKYzeEbOmwnvYye+A7r2uqk5tjXldKXZFbRYMO2q7u8U4Rx6W/qKcbFR6gyK tV2uxgTA4nHVETH2W0hUFfLMAak1oqSJKysy3foVeJkMQv9JiicRE9Tma2vIQae38ENf 9Hl1qXrFxjH+HfTB44tJFIdH4bS4XI3W9mH3Y= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=oqRnIlXxwg2YvWcpXWnxVXBNj6TKwPF8KWOfQK0VbWs=; b=CT1hep7Nno4RW1IRPryfqORuMhbeR7VhMnEbwwzgu22TB5h37ocXRHk/J3AVCk74hx qcC+FLEXuCOLYYepbkoZiIM7CUtSZG5RymgO+nQA+8YI/5+c+J1bdF19csVeeYF0DXj7 id2LnRF9v1vInYPF7Gf7lV3bp9bZq79rD1R+gxWayaUUqmELvt50ae7T1kJkR3KqX3yk VNbSUfxCAHpJDPVRSzdUVSRRAPodc8enJKY5HX4di0zBlwyQhejWUd10SnbOlpr6JCKT YtF/7yILfaa5pSY9AUkT0I+B+3LvEhlazVT8dbM9v4/Wjz3st4P9FnlYzf6qptywHfeV +XRQ== X-Gm-Message-State: AJcUukdr0LSPhD4j0DWAB9si7v64DzlExJAOreVjgyu9hEaGyDIbZ961 /17XHdCJllKg9DqxHIEjccZSAg== X-Received: by 2002:a1c:570d:: with SMTP id l13mr11869347wmb.139.1547467004848; Mon, 14 Jan 2019 03:56:44 -0800 (PST) Received: from orth.archaic.org.uk (orth.archaic.org.uk. [81.2.115.148]) by smtp.gmail.com with ESMTPSA id 125sm47835842wmm.26.2019.01.14.03.56.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 14 Jan 2019 03:56:44 -0800 (PST) From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Mon, 14 Jan 2019 11:56:36 +0000 Message-Id: <20190114115637.6335-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190114115637.6335-1-peter.maydell@linaro.org> References: <20190114115637.6335-1-peter.maydell@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::343 Subject: [Qemu-devel] [PATCH v2 3/4] accel/tcg: Add cluster number to TCG TB hash X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Peter Crosthwaite , Alistair Francis , Richard Henderson , "Emilio G . Cota" , "Edgar E. Iglesias" , Paolo Bonzini , Aleksandar Markovic Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Include the cluster number in the hash we use to look up TBs. This is important because a TB that is valid for one cluster at a given physical address and set of CPU flags is not necessarily valid for another: the two clusters may have different views of physical memory, or may have different CPU features (eg FPU present or absent). We put the cluster number in the high 8 bits of the TB cflags. This gives us up to 256 clusters, which should be enough for anybody. If we ever need more, or need more bits in cflags for other purposes, we could make tb_hash_func() take more data (and expand qemu_xxhash7() to qemu_xxhash8()). Signed-off-by: Peter Maydell --- v1->v2: move the setting of the cluster index in cf_mask in tb_htable_lookup() up to before we set desc.cf_mask from it... --- include/exec/exec-all.h | 4 +++- accel/tcg/cpu-exec.c | 3 +++ accel/tcg/translate-all.c | 3 +++ 3 files changed, 9 insertions(+), 1 deletion(-) -- 2.20.1 Reviewed-by: Richard Henderson diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 815e5b1e838..aa7b81aaf01 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -351,9 +351,11 @@ struct TranslationBlock { #define CF_USE_ICOUNT 0x00020000 #define CF_INVALID 0x00040000 /* TB is stale. Set with @jmp_lock held */ #define CF_PARALLEL 0x00080000 /* Generate code for a parallel context */ +#define CF_CLUSTER_MASK 0xff000000 /* Top 8 bits are cluster ID */ +#define CF_CLUSTER_SHIFT 24 /* cflags' mask for hashing/comparison */ #define CF_HASH_MASK \ - (CF_COUNT_MASK | CF_LAST_IO | CF_USE_ICOUNT | CF_PARALLEL) + (CF_COUNT_MASK | CF_LAST_IO | CF_USE_ICOUNT | CF_PARALLEL | CF_CLUSTER_MASK) /* Per-vCPU dynamic tracing state used to generate this TB */ uint32_t trace_vcpu_dstate; diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 870027d4359..6c4a33262f5 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -325,6 +325,9 @@ TranslationBlock *tb_htable_lookup(CPUState *cpu, target_ulong pc, struct tb_desc desc; uint32_t h; + cf_mask &= ~CF_CLUSTER_MASK; + cf_mask |= cpu->cluster_index << CF_CLUSTER_SHIFT; + desc.env = (CPUArchState *)cpu->env_ptr; desc.cs_base = cs_base; desc.flags = flags; diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 639f0b27287..ba27f5acc8c 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -1692,6 +1692,9 @@ TranslationBlock *tb_gen_code(CPUState *cpu, cflags |= CF_NOCACHE | 1; } + cflags &= ~CF_CLUSTER_MASK; + cflags |= cpu->cluster_index << CF_CLUSTER_SHIFT; + buffer_overflow: tb = tb_alloc(pc); if (unlikely(!tb)) {