From patchwork Tue Jan 29 14:35:11 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 156999 Delivered-To: patch@linaro.org Received: by 2002:a02:48:0:0:0:0:0 with SMTP id 69csp4853374jaa; Tue, 29 Jan 2019 08:19:09 -0800 (PST) X-Google-Smtp-Source: ALg8bN4OuKm622oXpH/Wxyl+Cuzha9QaUgZZkgCEdQi69Z/DLli7PYDOpjSd9BCbX+LqNTlgQ44U X-Received: by 2002:a25:ea05:: with SMTP id p5mr25049863ybd.73.1548778749044; Tue, 29 Jan 2019 08:19:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1548778749; cv=none; d=google.com; s=arc-20160816; b=DOd+owRLIsZc9Ju3W5pJd19sHwUcpc4C0MJ2mDuGwntiZBMZkMzb8sU79fUnlWhNeq tlu4Z0+3/AKN9G+TYElKpCk3NxhKaShLrbpjf55we8c96o51dTWURZq+LPxjtD/AdHIM r0+2VowWijNrgT9FLEIwbWHyXOf5/kntjUhm3G3WFVPHvRTh3MlA1XSJor7VU/Nl4q8D mbkZHMfS2SnNwGAEqrp+XblY7vtScJxcjXNnxcO7FTG9w3GA3cl1w7lCKMd0MpfgX/x0 TAkvtkV6ELr0wBOG04bdgWkyDmrXErUL3YNtkVwSf3YlhLMH97AoP2gm4G6kG/ufef/X gqHA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject:message-id:date:to:from :dkim-signature; bh=qcobqzIOzPYOj/qnGGoVYlFYLozoBssIQjFq+1fWaIw=; b=LE4X3msAYmSXBfvOz8TZLnSg2ZS89mNXP3QGsJKZPhSWVgYusKLxt0q0OAAc9olxN1 QH2P994rEFbrczjkLEX/9RPg7hmKqK4nWLxCRd0wi3whxFQZvonoXfNsjcGFb8nycwFo hi85Ai2X5wco8u1JkqdPvQo+Rwf1ARVfIjyzE24G5ZowS1c6+/TWRC4BgvLMoXEV73Qv O1RFvxm2sFRm+Rg4JCzV7kowqMdV7OzI1aZDW/sycjXTZFd+QkNpKRd2lNIWk3N3HPYf pIZdnNE9x23cK7hbXDMu5IHPV3wVaPUemCtA4FIKmK9Dopk34nDOxH5Y+UA94y6YKGa7 9oJg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=itTfpboZ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id o186si22737010ywb.31.2019.01.29.08.19.08 for (version=TLS1 cipher=AES128-SHA bits=128/128); Tue, 29 Jan 2019 08:19:09 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=itTfpboZ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([127.0.0.1]:50694 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1goUvY-0000t8-1n for patch@linaro.org; Tue, 29 Jan 2019 10:03:52 -0500 Received: from eggs.gnu.org ([209.51.188.92]:49784) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1goUqh-0006Aw-MB for qemu-devel@nongnu.org; Tue, 29 Jan 2019 09:58:57 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1goUUD-0008C4-TI for qemu-devel@nongnu.org; Tue, 29 Jan 2019 09:35:47 -0500 Received: from mail-oi1-x244.google.com ([2607:f8b0:4864:20::244]:33719) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1goUU7-00088A-SO for qemu-devel@nongnu.org; Tue, 29 Jan 2019 09:35:37 -0500 Received: by mail-oi1-x244.google.com with SMTP id c206so16334541oib.0 for ; Tue, 29 Jan 2019 06:35:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=qcobqzIOzPYOj/qnGGoVYlFYLozoBssIQjFq+1fWaIw=; b=itTfpboZ/q8V/JVBgEpLJKDjeHhUZC7f4tuq8gMrrIYPJ12qWMJOvfmouaXD2t7CLH PnFZShssGSeEdWWlEWM3XYeZe5KDxps95eLL97Jd+8LFGcCfYH+cd2nVqFKj4I/Ng+wz A1v9zrDisHCLoFZgMBuL1gUK63UAxR2/e7zUQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=qcobqzIOzPYOj/qnGGoVYlFYLozoBssIQjFq+1fWaIw=; b=kolI/oONZ+BUxuygxLf+Y79Zh9NKtzt97GIL0KtwaLdDp77PGO/dWPzjGM72gnckUi CdRyyPSLdQm9t4tgb3WFS0rxIA1thKACvyrmvsiQYSV3QoYWwUEf0nNtBrOp8B/fxstk kQRHWX1J6wC4xIEDgiN4PpivjheJakRIFiXcfvih6dSvZm51FmEwVnsf3sOYH+dIZRKm EQGK+S4NMRGuTTS9fVKVgNBeyFmfY0jgGVtemjsuBCBtPxVDr2jh3pjjt6gN3O9BoSVJ 1KUbRZ7MyXmp3vcYH49vZIqC+bqOHmDgYrgbitNOu7ct43nLfdbk+L9NiZuXyp06lKuS 90Tg== X-Gm-Message-State: AHQUAubS1W6RGgaP/oQ6+uTDzF766YBkg37BQi5++XN9MJs8Hdpmcg4H WjyLysyAvUOEiBTnh0ZxpVP4WDcfqic= X-Received: by 2002:aca:4b48:: with SMTP id y69mr9773773oia.200.1548772516382; Tue, 29 Jan 2019 06:35:16 -0800 (PST) Received: from cloudburst.twiddle.net ([12.227.73.85]) by smtp.gmail.com with ESMTPSA id q131sm6393758oih.1.2019.01.29.06.35.14 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 29 Jan 2019 06:35:15 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 29 Jan 2019 06:35:11 -0800 Message-Id: <20190129143511.12311-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::244 Subject: [Qemu-devel] [PATCH] target/arm: Enable API, APK bits in SCR, HCR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, alex.bennee@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" These bits become writable with the ARMv8.3-PAuth extension. Signed-off-by: Richard Henderson --- target/arm/helper.c | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.17.2 diff --git a/target/arm/helper.c b/target/arm/helper.c index 70277222da..a1a2ac7d06 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -1747,6 +1747,9 @@ static void scr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) if (cpu_isar_feature(aa64_lor, cpu)) { valid_mask |= SCR_TLOR; } + if (cpu_isar_feature(aa64_pauth, cpu)) { + valid_mask |= SCR_API | SCR_APK; + } /* Clear all-context RES0 bits. */ value &= valid_mask; @@ -4444,6 +4447,9 @@ static void hcr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) if (cpu_isar_feature(aa64_lor, cpu)) { valid_mask |= HCR_TLOR; } + if (cpu_isar_feature(aa64_pauth, cpu)) { + valid_mask |= HCR_API | HCR_APK; + } /* Clear RES0 bits. */ value &= valid_mask;