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[97.113.188.82]) by smtp.gmail.com with ESMTPSA id c4sm11861031pgq.85.2019.02.11.15.53.27 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 11 Feb 2019 15:53:27 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 11 Feb 2019 15:52:51 -0800 Message-Id: <20190211235258.542-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20190211235258.542-1-richard.henderson@linaro.org> References: <20190211235258.542-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::42a Subject: [Qemu-devel] [PATCH v3 21/28] target/arm: Set PSTATE.TCO on exception entry X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" R0085 specifies that exception handlers begin with tag checks overridden. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson --- v2: Only set if MTE feature present. --- target/arm/helper.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) -- 2.17.2 diff --git a/target/arm/helper.c b/target/arm/helper.c index f17e045706..b979ca0255 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -9476,6 +9476,7 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs) target_ulong addr = env->cp15.vbar_el[new_el]; unsigned int new_mode = aarch64_pstate_mode(new_el, true); unsigned int cur_el = arm_current_el(env); + unsigned int new_pstate; /* * Note that new_el can never be 0. If cur_el is 0, then @@ -9569,7 +9570,11 @@ static void arm_cpu_do_interrupt_aarch64(CPUState *cs) qemu_log_mask(CPU_LOG_INT, "...with ELR 0x%" PRIx64 "\n", env->elr_el[new_el]); - pstate_write(env, PSTATE_DAIF | new_mode); + new_pstate = new_mode | PSTATE_DAIF; + if (cpu_isar_feature(aa64_mte, cpu)) { + new_pstate |= PSTATE_TCO; + } + pstate_write(env, new_pstate); env->aarch64 = 1; aarch64_restore_sp(env, new_el);