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[66.75.72.255]) by smtp.gmail.com with ESMTPSA id f1sm280911pgl.35.2019.03.28.16.04.37 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 28 Mar 2019 16:04:38 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Thu, 28 Mar 2019 13:03:47 -1000 Message-Id: <20190328230404.12909-20-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190328230404.12909-1-richard.henderson@linaro.org> References: <20190328230404.12909-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::441 Subject: [Qemu-devel] [PATCH for-4.1 v2 19/36] target/openrisc: Use env_cpu, env_archcpu X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Signed-off-by: Richard Henderson --- target/openrisc/cpu.h | 5 ----- linux-user/openrisc/cpu_loop.c | 2 +- target/openrisc/exception_helper.c | 5 ++--- target/openrisc/sys_helper.c | 8 ++++---- 4 files changed, 7 insertions(+), 13 deletions(-) -- 2.17.1 Reviewed-by: Peter Maydell diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 3eda7957cf..853cf633e7 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -317,11 +317,6 @@ typedef struct OpenRISCCPU { } OpenRISCCPU; -static inline OpenRISCCPU *openrisc_env_get_cpu(CPUOpenRISCState *env) -{ - return container_of(env, OpenRISCCPU, env); -} - #define ENV_OFFSET offsetof(OpenRISCCPU, env) void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf); diff --git a/linux-user/openrisc/cpu_loop.c b/linux-user/openrisc/cpu_loop.c index f496e4b48a..4b8165b261 100644 --- a/linux-user/openrisc/cpu_loop.c +++ b/linux-user/openrisc/cpu_loop.c @@ -23,7 +23,7 @@ void cpu_loop(CPUOpenRISCState *env) { - CPUState *cs = CPU(openrisc_env_get_cpu(env)); + CPUState *cs = env_cpu(env); int trapnr; abi_long ret; target_siginfo_t info; diff --git a/target/openrisc/exception_helper.c b/target/openrisc/exception_helper.c index 6073a5b21c..dd639ba5f2 100644 --- a/target/openrisc/exception_helper.c +++ b/target/openrisc/exception_helper.c @@ -25,15 +25,14 @@ void HELPER(exception)(CPUOpenRISCState *env, uint32_t excp) { - OpenRISCCPU *cpu = openrisc_env_get_cpu(env); + OpenRISCCPU *cpu = env_archcpu(env); raise_exception(cpu, excp); } static void QEMU_NORETURN do_range(CPUOpenRISCState *env, uintptr_t pc) { - OpenRISCCPU *cpu = openrisc_env_get_cpu(env); - CPUState *cs = CPU(cpu); + CPUState *cs = env_cpu(env); cs->exception_index = EXCP_RANGE; cpu_loop_exit_restore(cs, pc); diff --git a/target/openrisc/sys_helper.c b/target/openrisc/sys_helper.c index 05f66c455b..8f11cb8202 100644 --- a/target/openrisc/sys_helper.c +++ b/target/openrisc/sys_helper.c @@ -30,8 +30,8 @@ void HELPER(mtspr)(CPUOpenRISCState *env, target_ulong spr, target_ulong rb) { #ifndef CONFIG_USER_ONLY - OpenRISCCPU *cpu = openrisc_env_get_cpu(env); - CPUState *cs = CPU(cpu); + OpenRISCCPU *cpu = env_archcpu(env); + CPUState *cs = env_cpu(env); target_ulong mr; int idx; @@ -194,8 +194,8 @@ target_ulong HELPER(mfspr)(CPUOpenRISCState *env, target_ulong rd, target_ulong spr) { #ifndef CONFIG_USER_ONLY - OpenRISCCPU *cpu = openrisc_env_get_cpu(env); - CPUState *cs = CPU(cpu); + OpenRISCCPU *cpu = env_archcpu(env); + CPUState *cs = env_cpu(env); int idx; switch (spr) {