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[209.51.188.17]) by mx.google.com with ESMTPS id b195si2042193qkg.260.2019.09.26.09.39.15 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 26 Sep 2019 09:39:15 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=sglKhyY6; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:40850 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWnS-0005iR-Fv for patch@linaro.org; Thu, 26 Sep 2019 12:39:14 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:41080) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iDWc2-0002XO-H3 for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iDWbz-0004c4-BJ for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:25 -0400 Received: from mail-pf1-f196.google.com ([209.85.210.196]:44342) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iDWbz-0004aX-6R for qemu-devel@nongnu.org; Thu, 26 Sep 2019 12:27:23 -0400 Received: by mail-pf1-f196.google.com with SMTP id q21so2103154pfn.11 for ; Thu, 26 Sep 2019 09:27:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=m0A5hOzZEJmS1c+sxnHnolxCjQzyN94AtrGRUtBbpGQ=; b=sglKhyY6pcUvb3rcImY9EopmQ7xuhFcLjIxOGbccP9Rt1kpFKwah1P+fUQTu0L82qo d6fxq/o6p0DCYLenuB3i6FLaWLuHZ2jcnt2h6nG1Jn6V0R5HMUy6UJN+puw/F9hUHIAL gzHlBP4kavlioLAWJrFVv9uUNCuHDb6EGYUeQNW3bTx8DVwib7/l1+FXkTl+lhMnH+Cr BUfzZ+W5q0SV4IwKwiuVG3oZbVjiDx235b2Az+zGeiD6vTIE7Ib+gA48XhIEk/HMfZqg GffaC9Pvum9A/dm0Z9dOjGREZMuPf12wLff3Kiv5dUNirKXkLKDiBjoUfrVwmEWdMxY5 PL+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=m0A5hOzZEJmS1c+sxnHnolxCjQzyN94AtrGRUtBbpGQ=; b=P+J7OybrmgFza1WRIfSM6VaPDzFG1XoGgIGKHpSbxRoKbLper3IuyTbsSQ7/bQfZIN 8n7tfVFRhKbrT0qIO60bGuy9KSEdhvsfme/jlQpXbZ65PjLECMybKR8LrlCFtKHkpTBw HMGZHNfCzpchDj2T7OkOUn4qyCDadDdXg+LEhpFAzS1+THBu0d5u8diIbtZbLHP/SPzR h5UZVfkzPNrZ2husJpNnKQuTh4kr3q6GwG5uUt4FeF5ppAS5/4nqA/4lJ8bdzGaVACBJ GKWBsqZrVEmM/MCJdGj2qo4GgLXXCbpeWvEnOT2ArrEmHPO7pKN3YfpJYnu6v/a8GVbi +rOQ== X-Gm-Message-State: APjAAAWIAXnXoKpcwpa4z1Znww2qQXpBHPf5exwgwLd37f+eP2gN0x1+ 6cfh4jnzv+oMMFylvAt8/K3Tn8DXHZU= X-Received: by 2002:a17:90a:a404:: with SMTP id y4mr4537383pjp.62.1569515179760; Thu, 26 Sep 2019 09:26:19 -0700 (PDT) Received: from localhost.localdomain ([12.157.10.114]) by smtp.gmail.com with ESMTPSA id 64sm4453169pfx.31.2019.09.26.09.26.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 26 Sep 2019 09:26:19 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v3 01/18] target/s390x: Truncate 32-bit psw_addr before creating TB Date: Thu, 26 Sep 2019 09:25:58 -0700 Message-Id: <20190926162615.31168-2-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190926162615.31168-1-richard.henderson@linaro.org> References: <20190926162615.31168-1-richard.henderson@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.85.210.196 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-s390x@nongnu.org, david@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" If, somehow, the psw_addr is out of range, truncate early rather than after we get into gen_intermediate_code. Reviewed-by: David Hildenbrand Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 26 +++++++++++++++++++------- target/s390x/translate.c | 6 ------ 2 files changed, 19 insertions(+), 13 deletions(-) -- 2.17.1 diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index e74a809257..ce20dafd23 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -357,18 +357,30 @@ static inline int cpu_mmu_index(CPUS390XState *env, bool ifetch) #endif } -static inline void cpu_get_tb_cpu_state(CPUS390XState* env, target_ulong *pc, - target_ulong *cs_base, uint32_t *flags) +static inline void cpu_get_tb_cpu_state(CPUS390XState* env, + target_ulong *p_pc, + target_ulong *cs_base, + uint32_t *p_flags) { - *pc = env->psw.addr; - *cs_base = env->ex_value; - *flags = (env->psw.mask >> FLAG_MASK_PSW_SHIFT) & FLAG_MASK_PSW; + uint32_t flags; + uint64_t pc; + + flags = (env->psw.mask >> FLAG_MASK_PSW_SHIFT) & FLAG_MASK_PSW; if (env->cregs[0] & CR0_AFP) { - *flags |= FLAG_MASK_AFP; + flags |= FLAG_MASK_AFP; } if (env->cregs[0] & CR0_VECTOR) { - *flags |= FLAG_MASK_VECTOR; + flags |= FLAG_MASK_VECTOR; } + + pc = env->psw.addr; + if (!(flags & FLAG_MASK_64)) { + pc &= 0x7fffffff; + } + + *p_pc = pc; + *cs_base = env->ex_value; + *p_flags = flags; } /* PER bits from control register 9 */ diff --git a/target/s390x/translate.c b/target/s390x/translate.c index a3e43ff9ec..e1c54ab03b 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -6446,12 +6446,6 @@ static void s390x_tr_init_disas_context(DisasContextBase *dcbase, CPUState *cs) { DisasContext *dc = container_of(dcbase, DisasContext, base); - /* 31-bit mode */ - if (!(dc->base.tb->flags & FLAG_MASK_64)) { - dc->base.pc_first &= 0x7fffffff; - dc->base.pc_next = dc->base.pc_first; - } - dc->cc_op = CC_OP_DYNAMIC; dc->ex_value = dc->base.tb->cs_base; dc->do_debug = dc->base.singlestep_enabled;