From patchwork Fri Oct 18 17:44:14 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 176920 Delivered-To: patch@linaro.org Received: by 2002:a92:7e96:0:0:0:0:0 with SMTP id q22csp1184322ill; Fri, 18 Oct 2019 10:49:51 -0700 (PDT) X-Google-Smtp-Source: APXvYqy0I3j5mkwMoYmclAuPfJOwlpSzXlZv/KvJ6tzsy0A0YvsoscWmNNvASi2UvSDvGJX1znC0 X-Received: by 2002:aa7:d898:: with SMTP id u24mr10921186edq.74.1571420991077; Fri, 18 Oct 2019 10:49:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1571420991; cv=none; d=google.com; s=arc-20160816; b=qsXx1oHmU2ZpVhk1tnZfkUelU3Up/PnXo5AwMGzyL4MaZJy02U5dZ+MjCdLneg+87/ NZme0yJtKW5WSSpwkPU0oCVmV4w1fA5drtSzrBIXeCUZkoSv0lI5YQpGh6AMiVa2YefP H6oVBjtD7BaJ/ZZXM0p2AJQqPbNpANZgRdyWxS33mYqdBYxNSMC7IfT5EPDQlirckjQw fi0Yt3dW6n4hsw+/qGctEYBeVh2FL3kh4muCRF8hKk8HpUZpzQjz2qRUlBsql8FtaVRT YFx+RX2mdreUSWGtLmo2EgcWmvlsVKDcgNXpIGlOY+OMc2FU3koPOp6aa1PmRHf/fCSi MdFQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=mDaUYtXyoxKyQ6YIW+CzLKUl72EI9Ve9jhEUulKMydM=; b=tjCQyHGn4nHJFVkazRKcRHVUK6fePsswhS1IG9TkOPX6+pK+6n7JIs2Tt3xUfauLSS hM/uqDWq8/vN4W7JEmr5hkSvWYJIzsS9eYFD7BsXsEeQIYfYIiE/ckHG8H82rePQkVq1 3OiaD23pI1w2K4rMiSHJhz8U82DXISeHnZsh/vLsZKqn1+tkqQfiDMDP2kxXk5hpWbcg wEG7JcsGxpPTdG9UVUfuHPdPlt2n3Upk6iNesTSPK4R+jE+jHlE8KDSVJNZ0IHhBBQrJ BisKPnMN9+AOX3/nlLAtV55HqqMVYi9TbIPLsmEiD0bXxGEY3aUXRUNdowbmpNk4Bfpx 4eXA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=kFYtkl62; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id b19si3796725ejj.83.2019.10.18.10.49.50 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 18 Oct 2019 10:49:51 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=kFYtkl62; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:44260 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLWNo-00030F-H5 for patch@linaro.org; Fri, 18 Oct 2019 13:49:48 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59147) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iLWIu-0006Sy-7g for qemu-devel@nongnu.org; Fri, 18 Oct 2019 13:44:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iLWIr-0005P0-R0 for qemu-devel@nongnu.org; Fri, 18 Oct 2019 13:44:44 -0400 Received: from mail-pg1-x544.google.com ([2607:f8b0:4864:20::544]:43728) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1iLWIp-0005Ml-OC for qemu-devel@nongnu.org; Fri, 18 Oct 2019 13:44:41 -0400 Received: by mail-pg1-x544.google.com with SMTP id i32so3742545pgl.10 for ; Fri, 18 Oct 2019 10:44:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mDaUYtXyoxKyQ6YIW+CzLKUl72EI9Ve9jhEUulKMydM=; b=kFYtkl62zY6PW+luGe9TZwJ7mEStN2EUGHwVIjT7YnMEr1NtqavFgtXVKH1l+75sRf 1ixz+lv/bl0D/bRyYRBsTHb+7WsT4RNjKbWXP7fVV9sMRjqJvhARthjNdfKF3iyI15Qj KkhU6VJHJuNpAJ+XUJc7L/fuUnwey4LH/EfXazpVwvmdAnTYfS5zlwxSQty/70HflDcn 96Q3ng07ztaLWfHXYuUBYQmjl0dE8dZkiLbPLd6fZCaUkFmTgmecEBiGl5PlwkGSx8lk gsGpcqeE/7A/7A7LeInXQBB1+nbSrAtMHj+wpSgLVEp2hTyW7wR4A+Qh5NkrCBu+/H5G bECQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mDaUYtXyoxKyQ6YIW+CzLKUl72EI9Ve9jhEUulKMydM=; b=YdR4Gy59ovE0psWW40T/baMwtwgeZHiIDEWZCzQPF6qAh35mNxforYKSEDVwCRauDd 5gEG0ym8XBKwpTjmX8TOfZGytdd9jdSoeEZpIyGcpD6OZDIwHPmYTtXxqVdCOBJ8tXgg du96rCg9LWG+mFf4u93dLeWz/L8dRQJA+7NBa19svZ93Y1GFOuKA/d9bjv5Wz3BJGcK8 Ijk1GjJFsdocydO5zXlYOguLLxWt/83+A+29LhHLdG/8oNEDxAgTfP440MvWnCZp/F93 URUd+60FAZkvlR6GjdGZzCJdFTI0diy3jhRlV9O7hpWqJY4xdgMY0DGhdRpjNviEPwfn XJbg== X-Gm-Message-State: APjAAAU9Nfjf/dy9fId9yxHEKHgp/I+XMtfZUsdBiK/bR6YYjxRXvem0 Y+9iAzJHoEI/rUPxLkZXy1ZtOCc02dA= X-Received: by 2002:a17:90a:aa97:: with SMTP id l23mr12570299pjq.7.1571420678183; Fri, 18 Oct 2019 10:44:38 -0700 (PDT) Received: from localhost.localdomain (97-113-7-119.tukw.qwest.net. [97.113.7.119]) by smtp.gmail.com with ESMTPSA id d20sm7857534pfq.88.2019.10.18.10.44.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 18 Oct 2019 10:44:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v8 05/22] target/arm: Split out rebuild_hflags_m32 Date: Fri, 18 Oct 2019 10:44:14 -0700 Message-Id: <20191018174431.1784-6-richard.henderson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191018174431.1784-1-richard.henderson@linaro.org> References: <20191018174431.1784-1-richard.henderson@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:4864:20::544 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Create a function to compute the values of the TBFLAG_A32 bits that will be cached, and are used by M-profile. Reviewed-by: Alex Bennée Signed-off-by: Richard Henderson --- target/arm/helper.c | 45 ++++++++++++++++++++++++++++++--------------- 1 file changed, 30 insertions(+), 15 deletions(-) -- 2.17.1 diff --git a/target/arm/helper.c b/target/arm/helper.c index 4c65476d93..d4303420da 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11083,6 +11083,29 @@ static uint32_t rebuild_hflags_common_32(CPUARMState *env, int fp_el, return rebuild_hflags_common(env, fp_el, mmu_idx, flags); } +static uint32_t rebuild_hflags_m32(CPUARMState *env, int fp_el, + ARMMMUIdx mmu_idx) +{ + uint32_t flags = 0; + + if (arm_v7m_is_handler_mode(env)) { + flags = FIELD_DP32(flags, TBFLAG_A32, HANDLER, 1); + } + + /* + * v8M always applies stack limit checks unless CCR.STKOFHFNMIGN + * is suppressing them because the requested execution priority + * is less than 0. + */ + if (arm_feature(env, ARM_FEATURE_V8) && + !((mmu_idx & ARM_MMU_IDX_M_NEGPRI) && + (env->v7m.ccr[env->v7m.secure] & R_V7M_CCR_STKOFHFNMIGN_MASK))) { + flags = FIELD_DP32(flags, TBFLAG_A32, STACKCHECK, 1); + } + + return rebuild_hflags_common_32(env, fp_el, mmu_idx, flags); +} + static uint32_t rebuild_hflags_a64(CPUARMState *env, int el, int fp_el, ARMMMUIdx mmu_idx) { @@ -11168,7 +11191,13 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, } } else { *pc = env->regs[15]; - flags = rebuild_hflags_common_32(env, fp_el, mmu_idx, 0); + + if (arm_feature(env, ARM_FEATURE_M)) { + flags = rebuild_hflags_m32(env, fp_el, mmu_idx); + } else { + flags = rebuild_hflags_common_32(env, fp_el, mmu_idx, 0); + } + flags = FIELD_DP32(flags, TBFLAG_A32, THUMB, env->thumb); flags = FIELD_DP32(flags, TBFLAG_A32, VECLEN, env->vfp.vec_len); flags = FIELD_DP32(flags, TBFLAG_A32, VECSTRIDE, env->vfp.vec_stride); @@ -11204,20 +11233,6 @@ void cpu_get_tb_cpu_state(CPUARMState *env, target_ulong *pc, } } - if (arm_v7m_is_handler_mode(env)) { - flags = FIELD_DP32(flags, TBFLAG_A32, HANDLER, 1); - } - - /* v8M always applies stack limit checks unless CCR.STKOFHFNMIGN is - * suppressing them because the requested execution priority is less than 0. - */ - if (arm_feature(env, ARM_FEATURE_V8) && - arm_feature(env, ARM_FEATURE_M) && - !((mmu_idx & ARM_MMU_IDX_M_NEGPRI) && - (env->v7m.ccr[env->v7m.secure] & R_V7M_CCR_STKOFHFNMIGN_MASK))) { - flags = FIELD_DP32(flags, TBFLAG_A32, STACKCHECK, 1); - } - if (arm_feature(env, ARM_FEATURE_M_SECURITY) && FIELD_EX32(env->v7m.fpccr[M_REG_S], V7M_FPCCR, S) != env->v7m.secure) { flags = FIELD_DP32(flags, TBFLAG_A32, FPCCR_S_WRONG, 1);