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[209.51.188.17]) by mx.google.com with ESMTPS id 65si1463374otw.204.2019.12.11.09.11.46 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 11 Dec 2019 09:11:47 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=TxkYuR1D; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:46482 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1if5Wb-0003n7-R0 for patch@linaro.org; Wed, 11 Dec 2019 12:11:45 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:39539) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1if5Qg-0005Bu-CO for qemu-devel@nongnu.org; Wed, 11 Dec 2019 12:05:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1if5Qe-0003MD-9E for qemu-devel@nongnu.org; Wed, 11 Dec 2019 12:05:38 -0500 Received: from mail-wm1-x342.google.com ([2a00:1450:4864:20::342]:40836) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1if5Qd-0003Js-TP for qemu-devel@nongnu.org; Wed, 11 Dec 2019 12:05:36 -0500 Received: by mail-wm1-x342.google.com with SMTP id t14so7764174wmi.5 for ; Wed, 11 Dec 2019 09:05:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=cTqY+VVrIEiDrOiDCyCP2RljFepIcDuXrggPXm+fTw0=; b=TxkYuR1DnqCgq1mczx8KHXMthfHNfQwOnzRJpuBI21ocFBCIaOIemVSwNrGKFHbbeG eDx6u7mKy97mGMD/RKmdgJD5jt7/r3X1MTd/QP/VvBxeHp69lLjEI4vw15gJZiuxNv+l C7NUVClkDRq39+geDsE9SgP2y5E4M3I5zECl6A1x5sZfdo7rCke0EOUdGdtwRzEm9JlE s153TxX8WtuRa44gfeUjomU/D978pnEFQjW752qUIA35Pu6WBn0xYlXWymKv46C1jZvk 3fk/6S3UqG9zuRudWSaaRrCDGJ/5LRFQnnR9RWvJwToqMJjs8oWbm/XIXpjbw7YItxqb pqOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=cTqY+VVrIEiDrOiDCyCP2RljFepIcDuXrggPXm+fTw0=; b=K7B3zNnbtBQyL2CtDgceeF2zRtV89gcE/ThqAIqupFrVgeww/B3kUaUI4wjeYkrnCo 4cte7mzoPz+y22uDXDJyjU4AftQR1IbSKq7QPoxNT+ZEX7IvVGvE+Q+El35BsZYDMgpW 2aK4ZJPZ/kJmLm+RqG5yqk35e3dXhepajlDNCv0Y/Z6nM9rK1P3eeYd6gAD8izNdY19Q gbXg+oOXlww0yRXWPq3pwfYMMdGMuicrM1pCPGZ73yUHcDXgdRCJ0JcIb+q3rCdUZKly RGEdOlSZncey+YL0DtMOtszYKHC1vWtkWr8AISFWSgN1JqL1vR1fGZB9BzBafI/UYvz8 iodA== X-Gm-Message-State: APjAAAV00OHzgoaXiAuSeR415vIpzn/heXdEELiALrzT0iA3ZQ0kalDB YiTYmmG4s7U52/uFz2k/HPhi+A== X-Received: by 2002:a1c:638a:: with SMTP id x132mr955737wmb.43.1576083934578; Wed, 11 Dec 2019 09:05:34 -0800 (PST) Received: from zen.linaroharston ([51.148.130.216]) by smtp.gmail.com with ESMTPSA id a184sm3043182wmf.29.2019.12.11.09.05.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 11 Dec 2019 09:05:30 -0800 (PST) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id 62E7D1FF99; Wed, 11 Dec 2019 17:05:23 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Subject: [PATCH v3 10/20] target/arm: explicitly encode regnum in our XML Date: Wed, 11 Dec 2019 17:05:10 +0000 Message-Id: <20191211170520.7747-11-alex.bennee@linaro.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191211170520.7747-1-alex.bennee@linaro.org> References: <20191211170520.7747-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::342 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: damien.hedde@greensocs.com, Peter Maydell , luis.machado@linaro.org, richard.henderson@linaro.org, "open list:ARM TCG CPUs" , alan.hayward@arm.com, =?utf-8?q?Alex?= =?utf-8?q?_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This is described as optional but I'm not convinced of the numbering when multiple target fragments are sent. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- v2 - post inc param->n in place so we don't get out count wrong --- target/arm/cpu.h | 2 +- target/arm/gdbstub.c | 17 +++++++++++------ target/arm/helper.c | 2 +- 3 files changed, 13 insertions(+), 8 deletions(-) -- 2.20.1 diff --git a/target/arm/cpu.h b/target/arm/cpu.h index a31c7a36d6b..cc7258d5f1d 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -961,7 +961,7 @@ int arm_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); /* Dynamically generates for gdb stub an XML description of the sysregs from * the cp_regs hashtable. Returns the registered sysregs number. */ -int arm_gen_dynamic_sysreg_xml(CPUState *cpu); +int arm_gen_dynamic_sysreg_xml(CPUState *cpu, int base_reg); /* Returns the dynamically generated XML for the gdb stub. * Returns a pointer to the XML contents for the specified XML file or NULL diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c index 1f68ab98c3b..69c35462a63 100644 --- a/target/arm/gdbstub.c +++ b/target/arm/gdbstub.c @@ -24,6 +24,7 @@ typedef struct RegisterSysregXmlParam { CPUState *cs; GString *s; + int n; } RegisterSysregXmlParam; /* Old gdb always expect FPA registers. Newer (xml-aware) gdb only expect @@ -108,10 +109,11 @@ int arm_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n) static void arm_gen_one_xml_sysreg_tag(GString *s, DynamicGDBXMLInfo *dyn_xml, ARMCPRegInfo *ri, uint32_t ri_key, - int bitsize) + int bitsize, int regnum) { g_string_append_printf(s, "name); g_string_append_printf(s, " bitsize=\"%d\"", bitsize); + g_string_append_printf(s, " regnum=\"%d\"", regnum); g_string_append_printf(s, " group=\"cp_regs\"/>"); dyn_xml->data.cpregs.keys[dyn_xml->num] = ri_key; dyn_xml->num++; @@ -131,7 +133,8 @@ static void arm_register_sysreg_for_xml(gpointer key, gpointer value, if (!(ri->type & (ARM_CP_NO_RAW | ARM_CP_NO_GDB))) { if (arm_feature(env, ARM_FEATURE_AARCH64)) { if (ri->state == ARM_CP_STATE_AA64) { - arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 64); + arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 64, + param->n++); } } else { if (ri->state == ARM_CP_STATE_AA32) { @@ -140,20 +143,22 @@ static void arm_register_sysreg_for_xml(gpointer key, gpointer value, return; } if (ri->type & ARM_CP_64BIT) { - arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 64); + arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 64, + param->n++); } else { - arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 32); + arm_gen_one_xml_sysreg_tag(s , dyn_xml, ri, ri_key, 32, + param->n++); } } } } } -int arm_gen_dynamic_sysreg_xml(CPUState *cs) +int arm_gen_dynamic_sysreg_xml(CPUState *cs, int base_reg) { ARMCPU *cpu = ARM_CPU(cs); GString *s = g_string_new(NULL); - RegisterSysregXmlParam param = {cs, s}; + RegisterSysregXmlParam param = {cs, s, base_reg}; cpu->dyn_sysreg_xml.num = 0; cpu->dyn_sysreg_xml.data.cpregs.keys = g_new(uint32_t, g_hash_table_size(cpu->cp_regs)); diff --git a/target/arm/helper.c b/target/arm/helper.c index 4bf133e2f42..d00e4fcca86 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -6995,7 +6995,7 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) 19, "arm-vfp.xml", 0); } gdb_register_coprocessor(cs, arm_gdb_get_sysreg, arm_gdb_set_sysreg, - arm_gen_dynamic_sysreg_xml(cs), + arm_gen_dynamic_sysreg_xml(cs, cs->gdb_num_regs), "system-registers.xml", 0); }