diff mbox series

[v2,19/21] target/arm: Use isar_feature function for testing AA32HPD feature

Message ID 20200214175116.9164-20-peter.maydell@linaro.org
State Superseded
Headers show
Series arm: ARMv8.1- and v8.4-PMU, ID reg cleanup, [H]ACTLR2 | expand

Commit Message

Peter Maydell Feb. 14, 2020, 5:51 p.m. UTC
Now we have moved ID_MMFR4 into the ARMISARegisters struct, we
can define and use an isar_feature for the presence of the
ARMv8.2-AA32HPD feature, rather than open-coding the test.

While we're here, correct a comment typo which missed an 'A'
from the feature name.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
 target/arm/cpu.h    | 5 +++++
 target/arm/helper.c | 4 ++--
 2 files changed, 7 insertions(+), 2 deletions(-)

-- 
2.20.1

Comments

Richard Henderson Feb. 14, 2020, 8:32 p.m. UTC | #1
On 2/14/20 9:51 AM, Peter Maydell wrote:
> Now we have moved ID_MMFR4 into the ARMISARegisters struct, we

> can define and use an isar_feature for the presence of the

> ARMv8.2-AA32HPD feature, rather than open-coding the test.

> 

> While we're here, correct a comment typo which missed an 'A'

> from the feature name.

> 

> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

> ---

>  target/arm/cpu.h    | 5 +++++

>  target/arm/helper.c | 4 ++--

>  2 files changed, 7 insertions(+), 2 deletions(-)


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>



r~
diff mbox series

Patch

diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index ba97fc75c1d..276030a5cf3 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3526,6 +3526,11 @@  static inline bool isar_feature_aa32_pmu_8_4(const ARMISARegisters *id)
         FIELD_EX32(id->id_dfr0, ID_DFR0, PERFMON) != 0xf;
 }
 
+static inline bool isar_feature_aa32_hpd(const ARMISARegisters *id)
+{
+    return FIELD_EX32(id->id_mmfr4, ID_MMFR4, HPDS) != 0;
+}
+
 /*
  * 64-bit feature tests via id registers.
  */
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 492741a2b0b..56b1c08f027 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -7408,8 +7408,8 @@  void register_cp_regs_for_features(ARMCPU *cpu)
     } else {
         define_arm_cp_regs(cpu, vmsa_pmsa_cp_reginfo);
         define_arm_cp_regs(cpu, vmsa_cp_reginfo);
-        /* TTCBR2 is introduced with ARMv8.2-A32HPD.  */
-        if (FIELD_EX32(cpu->isar.id_mmfr4, ID_MMFR4, HPDS) != 0) {
+        /* TTCBR2 is introduced with ARMv8.2-AA32HPD.  */
+        if (cpu_isar_feature(aa32_hpd, cpu)) {
             define_one_arm_cp_reg(cpu, &ttbcr2_reginfo);
         }
     }