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[209.51.188.17]) by mx.google.com with ESMTPS id l4si4893793ybb.495.2020.05.21.09.59.03 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 21 May 2020 09:59:03 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=NMj8KPVl; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:34150 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jboX8-0006ur-V3 for patch@linaro.org; Thu, 21 May 2020 12:59:02 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:49890) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jboIb-0003LY-5h for qemu-devel@nongnu.org; Thu, 21 May 2020 12:44:01 -0400 Received: from mail-qv1-xf32.google.com ([2607:f8b0:4864:20::f32]:43923) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jboIa-0006Zj-4K for qemu-devel@nongnu.org; Thu, 21 May 2020 12:44:00 -0400 Received: by mail-qv1-xf32.google.com with SMTP id p4so3346259qvr.10 for ; Thu, 21 May 2020 09:43:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vmVPXwFQm0m0SAqlzFsT5BhTrQzusWHBnvRHdxyhIFI=; b=NMj8KPVlLlhzODFX4C1vHZ8TOeFAaZ+gz6xo7CPO0X3bl/kX38yuw0Y2fqmoynghIk wVjelWmkoGmWoW+sCxNPVdFLrQtwK526N/a7F9F/Y6iV9GKhHp3I+4Jf/nHNTMQ0ACVl 1Hjz2LDEHqFTH3Rnjxvz6stC42NMzTiUX4sXi0uOJRvFC4TgfCnTL5X+zkpUMi/HXvSN xpeCZrGLKKCUBXYzQSuGeW92KKJFG3BjZaKLyIKvkmC6lw3ERCjZTsBqpWax/H2KDETR kiCAY/giOqioKt1PE95ZJciq+M2jJleN4M1lEsh5u0R9xWMS9Or1jeVVwAjwBUod602r cvgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vmVPXwFQm0m0SAqlzFsT5BhTrQzusWHBnvRHdxyhIFI=; b=GiDw0rhUpma8apRm82mwoSNKc1k4zr29gzUQwc9G74+QH1oAR1F2slUZPeP8YiNxuO UguMSAWCHXIKJwXRyuOYlbZvmWUFlmLnzvX2qXPWEkXcN24oZKkRErQDaLBvD280awpe y09phtaecy5zy1L3BW0lCRAKbwO82J9LybLlsZCWJM/SCQwPkifmoaWPq7U3lZwMoo1Q lHYiXnd0yzSGiC7L3fOJSHWjEQAXytR5uu386/I6pzngCFz4yljX65v8tmZcpwTlIbbr kMK9tcOpPa56qoXuw+1MhO3u7PN3KF0bdF86Kj56l+sB/eYSCc0+QS1TmmhWUWDz2OuO jfcA== X-Gm-Message-State: AOAM5319th99ow/ecG1n/XG0Zfr1Akj4ksPRcCW6e7VrZqfIjRa+jcs1 srM8v6XIf/W5zBqFIckiZ1ViP9uy7pNBqA== X-Received: by 2002:a0c:ba99:: with SMTP id x25mr10929438qvf.119.1590079438779; Thu, 21 May 2020 09:43:58 -0700 (PDT) Received: from Rfoley-MA01.hsd1.ma.comcast.net ([2601:199:4480:60c0:1944:c530:655c:5583]) by smtp.gmail.com with ESMTPSA id x24sm5923829qth.57.2020.05.21.09.43.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2020 09:43:58 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 33/74] cpu: define cpu_interrupt_request helpers Date: Thu, 21 May 2020 12:39:30 -0400 Message-Id: <20200521164011.638-34-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::f32; envelope-from=robert.foley@linaro.org; helo=mail-qv1-xf32.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, cota@braap.org, alex.bennee@linaro.org, robert.foley@linaro.org, peter.puhov@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: "Emilio G. Cota" Add a comment about how atomic_read works here. The comment refers to a "BQL-less CPU loop", which will materialize toward the end of this series. Note that the modifications to cpu_reset_interrupt are there to avoid deadlock during the CPU lock transition; once that is complete, cpu_interrupt_request will be simple again. Reviewed-by: Richard Henderson Reviewed-by: Alex Bennée Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- hw/core/cpu.c | 27 +++++++++++++++++++++------ include/hw/core/cpu.h | 37 +++++++++++++++++++++++++++++++++++++ 2 files changed, 58 insertions(+), 6 deletions(-) -- 2.17.1 diff --git a/hw/core/cpu.c b/hw/core/cpu.c index 67a9c2bb16..be9efbeaf4 100644 --- a/hw/core/cpu.c +++ b/hw/core/cpu.c @@ -99,14 +99,29 @@ static void cpu_common_get_memory_mapping(CPUState *cpu, * BQL here if we need to. cpu_interrupt assumes it is held.*/ void cpu_reset_interrupt(CPUState *cpu, int mask) { - bool need_lock = !qemu_mutex_iothread_locked(); + bool has_bql = qemu_mutex_iothread_locked(); + bool has_cpu_lock = cpu_mutex_locked(cpu); - if (need_lock) { - qemu_mutex_lock_iothread(); + if (has_bql) { + if (has_cpu_lock) { + atomic_set(&cpu->interrupt_request, cpu->interrupt_request & ~mask); + } else { + cpu_mutex_lock(cpu); + atomic_set(&cpu->interrupt_request, cpu->interrupt_request & ~mask); + cpu_mutex_unlock(cpu); + } + return; + } + + if (has_cpu_lock) { + cpu_mutex_unlock(cpu); } - cpu->interrupt_request &= ~mask; - if (need_lock) { - qemu_mutex_unlock_iothread(); + qemu_mutex_lock_iothread(); + cpu_mutex_lock(cpu); + atomic_set(&cpu->interrupt_request, cpu->interrupt_request & ~mask); + qemu_mutex_unlock_iothread(); + if (!has_cpu_lock) { + cpu_mutex_unlock(cpu); } } diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 820c5b0a9a..6ed806db60 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -522,6 +522,43 @@ static inline void cpu_halted_set(CPUState *cpu, uint32_t val) cpu_mutex_unlock(cpu); } +/* + * When sending an interrupt, setters OR the appropriate bit and kick the + * destination vCPU. The latter can then read interrupt_request without + * acquiring the CPU lock, because once the kick-induced completes, they'll read + * an up-to-date interrupt_request. + * Setters always acquire the lock, which guarantees that (1) concurrent + * updates from different threads won't result in data races, and (2) the + * BQL-less CPU loop will always see an up-to-date interrupt_request, since the + * loop holds the CPU lock. + */ +static inline uint32_t cpu_interrupt_request(CPUState *cpu) +{ + return atomic_read(&cpu->interrupt_request); +} + +static inline void cpu_interrupt_request_or(CPUState *cpu, uint32_t mask) +{ + if (cpu_mutex_locked(cpu)) { + atomic_set(&cpu->interrupt_request, cpu->interrupt_request | mask); + return; + } + cpu_mutex_lock(cpu); + atomic_set(&cpu->interrupt_request, cpu->interrupt_request | mask); + cpu_mutex_unlock(cpu); +} + +static inline void cpu_interrupt_request_set(CPUState *cpu, uint32_t val) +{ + if (cpu_mutex_locked(cpu)) { + atomic_set(&cpu->interrupt_request, val); + return; + } + cpu_mutex_lock(cpu); + atomic_set(&cpu->interrupt_request, val); + cpu_mutex_unlock(cpu); +} + static inline void cpu_tb_jmp_cache_clear(CPUState *cpu) { unsigned int i;