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[209.51.188.17]) by mx.google.com with ESMTPS id u18si3902403qtu.148.2020.05.21.10.13.34 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Thu, 21 May 2020 10:13:34 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=q81pMuSf; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:43390 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1jbolB-00066f-UW for patch@linaro.org; Thu, 21 May 2020 13:13:33 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:50076) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1jboIz-0004Gp-6z for qemu-devel@nongnu.org; Thu, 21 May 2020 12:44:25 -0400 Received: from mail-qk1-x743.google.com ([2607:f8b0:4864:20::743]:46379) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1jboIy-0006fA-4U for qemu-devel@nongnu.org; Thu, 21 May 2020 12:44:24 -0400 Received: by mail-qk1-x743.google.com with SMTP id f83so7781462qke.13 for ; Thu, 21 May 2020 09:44:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=V+COCY1tch1+h8AFER7aKTPV6Dtrz1h9iyiTM5X9pZo=; b=q81pMuSfHpaSQP0Bg6AOmJQPY1Vlzu4VEsHUhanDswxU9oDMvvuwuHCItNV6UMUlSN WJE6cPs1TGCrcbYeiXqWQBLwP+jrqDLqK2Bx1EDHupkPAN/EZ8jtNlqfB1kfYWMpvlgO LO8wcmOyMgbak/4n5Ha2hcsfA1zukYy9zYxDet9wmyy7AaZ4sZkhcjUOALHD59K5w9bd A6e3bp7AKFZ44F4dimb101S0HIlqh4Wul5Xi2U6R/+EGLIOo/7dNSJ7i3m0kI6R3n7yl YywP9XkFwuzvjbB18qSf6Q83W203JDvYYimzN69TwngzwR8VXqfsEzx6rT4vBzdt1K1t iQ9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=V+COCY1tch1+h8AFER7aKTPV6Dtrz1h9iyiTM5X9pZo=; b=fQnBFE3HkzlpRu8Tzb8FuC6IRdj5NrKfPVy7xkgBA4uq9qs/D0rSolWsdM6we02F8C D5rTlegvUeN+jttwpiBH5GY6DIDvNvxNnie59oB2bjL9r6JNZD7KvMJJJa8+e0/iS60f 8dz01uRphVaWG9o4O6COjDRKubNVVhHjsfVeUaSKU5po2CDqGqQ5duBVPlv7j5fSLV4N 9/Op1TcdTqP2kN9EzWCJbXar8JFf4AWfZcIkPpLZdMISpMXP21AIsLnW+Y4/0/Zt1UBF PsiRvmRyB4RBwmjqi9dU5HMlR5QaGRuZ5O8uPsWEyM99wk29vH8myOXgeEZTbIvmsSsu KJVA== X-Gm-Message-State: AOAM532+Vn38hGiLqfxSepLfzmnTfBK6G1LiEB7xp4QePkzshKSYWzNN kZXt+ngrPVaYEhdhnh8jp0f0PhNtaojQgQ== X-Received: by 2002:a37:f517:: with SMTP id l23mr10962919qkk.475.1590079463093; Thu, 21 May 2020 09:44:23 -0700 (PDT) Received: from Rfoley-MA01.hsd1.ma.comcast.net ([2601:199:4480:60c0:1944:c530:655c:5583]) by smtp.gmail.com with ESMTPSA id x24sm5923829qth.57.2020.05.21.09.44.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 May 2020 09:44:22 -0700 (PDT) From: Robert Foley To: qemu-devel@nongnu.org Subject: [PATCH v9 51/74] mips: convert to cpu_interrupt_request Date: Thu, 21 May 2020 12:39:48 -0400 Message-Id: <20200521164011.638-52-robert.foley@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200521164011.638-1-robert.foley@linaro.org> References: <20200521164011.638-1-robert.foley@linaro.org> Received-SPF: pass client-ip=2607:f8b0:4864:20::743; envelope-from=robert.foley@linaro.org; helo=mail-qk1-x743.google.com X-detected-operating-system: by eggs.gnu.org: No matching host in p0f cache. That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=_AUTOLEARN X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.foley@linaro.org, richard.henderson@linaro.org, Aleksandar Markovic , cota@braap.org, peter.puhov@linaro.org, alex.bennee@linaro.org, Aurelien Jarno Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: "Emilio G. Cota" Cc: Aurelien Jarno Cc: Aleksandar Markovic Reviewed-by: Richard Henderson Signed-off-by: Emilio G. Cota Signed-off-by: Robert Foley --- target/mips/cpu.c | 7 ++++--- target/mips/kvm.c | 2 +- 2 files changed, 5 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/target/mips/cpu.c b/target/mips/cpu.c index e86cd06548..761d8aaa54 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -56,13 +56,14 @@ static bool mips_cpu_has_work(CPUState *cs) MIPSCPU *cpu = MIPS_CPU(cs); CPUMIPSState *env = &cpu->env; bool has_work = false; + uint32_t interrupt_request = cpu_interrupt_request(cs); /* * Prior to MIPS Release 6 it is implementation dependent if non-enabled * interrupts wake-up the CPU, however most of the implementations only * check for interrupts that can be taken. */ - if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && + if ((interrupt_request & CPU_INTERRUPT_HARD) && cpu_mips_hw_interrupts_pending(env)) { if (cpu_mips_hw_interrupts_enabled(env) || (env->insn_flags & ISA_MIPS32R6)) { @@ -76,7 +77,7 @@ static bool mips_cpu_has_work(CPUState *cs) * The QEMU model will issue an _WAKE request whenever the CPUs * should be woken up. */ - if (cs->interrupt_request & CPU_INTERRUPT_WAKE) { + if (interrupt_request & CPU_INTERRUPT_WAKE) { has_work = true; } @@ -86,7 +87,7 @@ static bool mips_cpu_has_work(CPUState *cs) } /* MIPS Release 6 has the ability to halt the CPU. */ if (env->CP0_Config5 & (1 << CP0C5_VP)) { - if (cs->interrupt_request & CPU_INTERRUPT_WAKE) { + if (interrupt_request & CPU_INTERRUPT_WAKE) { has_work = true; } if (!mips_vp_active(env)) { diff --git a/target/mips/kvm.c b/target/mips/kvm.c index 2b7d680547..e9b7a9f2ad 100644 --- a/target/mips/kvm.c +++ b/target/mips/kvm.c @@ -141,7 +141,7 @@ void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run) qemu_mutex_lock_iothread(); - if ((cs->interrupt_request & CPU_INTERRUPT_HARD) && + if ((cpu_interrupt_request(cs) & CPU_INTERRUPT_HARD) && cpu_mips_io_interrupts_pending(cpu)) { intr.cpu = -1; intr.irq = 2;