| Message ID | 20200724064509.331-7-alex.bennee@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | candidate fixes for 5.1-rc1 (testing, semihosting, OOM tcg, x86 fpu) | expand |
Reviewed-by: Robert Foley <robert.foley@linaro.org> On Fri, 24 Jul 2020 at 02:49, Alex Bennée <alex.bennee@linaro.org> wrote: > > It turns out there are some 64 bit systems that have relatively low > amounts of physical memory available to them (typically CI system). > Even with swapping available a 1GB translation buffer that fills up > can put the machine under increased memory pressure. Detect these low > memory situations and reduce tb_size appropriately. > > Fixes: 600e17b2615 ("accel/tcg: increase default code gen buffer size for 64 bit") > Signed-off-by: Alex Bennée <alex.bennee@linaro.org> > Cc: BALATON Zoltan <balaton@eik.bme.hu> > Cc: Christian Ehrhardt <christian.ehrhardt@canonical.com> > > --- > v3 > - use slightly tweak the logic to taper off more nicely > --- > accel/tcg/translate-all.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c > index 2afa46bd2b1..2d83013633b 100644 > --- a/accel/tcg/translate-all.c > +++ b/accel/tcg/translate-all.c > @@ -976,7 +976,12 @@ static inline size_t size_code_gen_buffer(size_t tb_size) > { > /* Size the buffer. */ > if (tb_size == 0) { > - tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE; > + size_t phys_mem = qemu_get_host_physmem(); > + if (phys_mem == 0) { > + tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE; > + } else { > + tb_size = MIN(DEFAULT_CODE_GEN_BUFFER_SIZE, phys_mem / 8); > + } > } > if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) { > tb_size = MIN_CODE_GEN_BUFFER_SIZE; > -- > 2.20.1 > >
On 7/23/20 11:44 PM, Alex Bennée wrote: > It turns out there are some 64 bit systems that have relatively low > amounts of physical memory available to them (typically CI system). > Even with swapping available a 1GB translation buffer that fills up > can put the machine under increased memory pressure. Detect these low > memory situations and reduce tb_size appropriately. > > Fixes: 600e17b2615 ("accel/tcg: increase default code gen buffer size for 64 bit") > Signed-off-by: Alex Bennée <alex.bennee@linaro.org> > Cc: BALATON Zoltan <balaton@eik.bme.hu> > Cc: Christian Ehrhardt <christian.ehrhardt@canonical.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 2afa46bd2b1..2d83013633b 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -976,7 +976,12 @@ static inline size_t size_code_gen_buffer(size_t tb_size) { /* Size the buffer. */ if (tb_size == 0) { - tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE; + size_t phys_mem = qemu_get_host_physmem(); + if (phys_mem == 0) { + tb_size = DEFAULT_CODE_GEN_BUFFER_SIZE; + } else { + tb_size = MIN(DEFAULT_CODE_GEN_BUFFER_SIZE, phys_mem / 8); + } } if (tb_size < MIN_CODE_GEN_BUFFER_SIZE) { tb_size = MIN_CODE_GEN_BUFFER_SIZE;
It turns out there are some 64 bit systems that have relatively low amounts of physical memory available to them (typically CI system). Even with swapping available a 1GB translation buffer that fills up can put the machine under increased memory pressure. Detect these low memory situations and reduce tb_size appropriately. Fixes: 600e17b2615 ("accel/tcg: increase default code gen buffer size for 64 bit") Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Cc: BALATON Zoltan <balaton@eik.bme.hu> Cc: Christian Ehrhardt <christian.ehrhardt@canonical.com> --- v3 - use slightly tweak the logic to taper off more nicely --- accel/tcg/translate-all.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) -- 2.20.1