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d="scan'208";a="254369417" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 14 Aug 2020 23:15:16 +0800 IronPort-SDR: i/5vfE+G3Oqu884aydmtwgm+vCdaMY9Zqz8BU92bOsXGBngVxfEKiHN+3R6k0u9ayg006RG3R2 bbKbXqBr5mZA== Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Aug 2020 08:02:21 -0700 IronPort-SDR: nQvCyNy1oYTod22czV3ViLsaufu7XLwG5FsXnQTvtCa50spc+S0ePO4YvFGZz+j2XUGoIQLcPw QEqO01wiohFw== WDCIronportException: Internal Received: from jbfyk72.ad.shared (HELO risc6-mainframe.hgst.com) ([10.86.59.14]) by uls-op-cesaip02.wdc.com with ESMTP; 14 Aug 2020 08:15:16 -0700 From: Alistair Francis To: qemu-devel@nongnu.org Subject: [PULL v2 18/20] hw/intc: ibex_plic: Update the pending irqs Date: Fri, 14 Aug 2020 08:05:04 -0700 Message-Id: <20200814150506.2070566-19-alistair.francis@wdc.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200814150506.2070566-1-alistair.francis@wdc.com> References: <20200814150506.2070566-1-alistair.francis@wdc.com> MIME-Version: 1.0 Received-SPF: pass client-ip=68.232.141.245; envelope-from=prvs=4887bfbec=alistair.francis@wdc.com; helo=esa1.hgst.iphmx.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/14 11:15:16 X-ACL-Warn: Detected OS = FreeBSD 9.x or newer [fuzzy] X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jessica Clarke , Alistair Francis , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" After a claim or a priority change we need to update the pending interrupts. This is based on the same patch for the SiFive PLIC: 55765822804f5a58594e "riscv: plic: Add a couple of mising sifive_plic_update calls" Signed-off-by: Alistair Francis Cc: Jessica Clarke Reviewed-by: Philippe Mathieu-Daudé Message-Id: <0693aa700a4c67c49b3f1c973a82b257fdb7198d.1595655188.git.alistair.francis@wdc.com> --- hw/intc/ibex_plic.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/intc/ibex_plic.c b/hw/intc/ibex_plic.c index 41079518c6..578edd2ce0 100644 --- a/hw/intc/ibex_plic.c +++ b/hw/intc/ibex_plic.c @@ -121,6 +121,9 @@ static uint64_t ibex_plic_read(void *opaque, hwaddr addr, s->pending[pending_num] &= ~(1 << (s->claim % 32)); ret = s->claim; + + /* Update the interrupt status after the claim */ + ibex_plic_update(s); } return ret; @@ -140,6 +143,7 @@ static void ibex_plic_write(void *opaque, hwaddr addr, } else if (addr_between(addr, s->priority_base, s->priority_num)) { uint32_t irq = ((addr - s->priority_base) >> 2) + 1; s->priority[irq] = value & 7; + ibex_plic_update(s); } else if (addr_between(addr, s->enable_base, s->enable_num)) { uint32_t enable_reg = (addr - s->enable_base) / 4;