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That's all we know. X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E . Iglesias" , peter.maydell@linaro.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" These return-from-exception type instructions have modified MSR to re-enable various forms of interrupt. Force a return to the main loop. Consolidate the cleanup of tb_flags into mb_tr_translate_insn. Reviewed-by: Edgar E. Iglesias Tested-by: Edgar E. Iglesias Signed-off-by: Richard Henderson --- target/microblaze/translate.c | 27 ++++++++++++++++----------- 1 file changed, 16 insertions(+), 11 deletions(-) -- 2.25.1 diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 608d413c83..da84fdb20b 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -1518,7 +1518,6 @@ static void do_rti(DisasContext *dc) tcg_gen_or_i32(cpu_msr, cpu_msr, tmp); tcg_temp_free_i32(tmp); - dc->tb_flags &= ~DRTI_FLAG; } static void do_rtb(DisasContext *dc) @@ -1531,7 +1530,6 @@ static void do_rtb(DisasContext *dc) tcg_gen_or_i32(cpu_msr, cpu_msr, tmp); tcg_temp_free_i32(tmp); - dc->tb_flags &= ~DRTB_FLAG; } static void do_rte(DisasContext *dc) @@ -1545,7 +1543,6 @@ static void do_rte(DisasContext *dc) tcg_gen_or_i32(cpu_msr, cpu_msr, tmp); tcg_temp_free_i32(tmp); - dc->tb_flags &= ~DRTE_FLAG; } /* Insns connected to FSL or AXI stream attached devices. */ @@ -1700,12 +1697,16 @@ static void mb_tr_translate_insn(DisasContextBase *dcb, CPUState *cs) * Finish any return-from branch. * TODO: Diagnose rtXd in delay slot of rtYd earlier. */ - if (dc->tb_flags & DRTI_FLAG) { - do_rti(dc); - } else if (dc->tb_flags & DRTB_FLAG) { - do_rtb(dc); - } else if (dc->tb_flags & DRTE_FLAG) { - do_rte(dc); + uint32_t rt_ibe = dc->tb_flags & (DRTI_FLAG | DRTB_FLAG | DRTE_FLAG); + if (unlikely(rt_ibe != 0)) { + dc->tb_flags &= ~(DRTI_FLAG | DRTB_FLAG | DRTE_FLAG); + if (rt_ibe & DRTI_FLAG) { + do_rti(dc); + } else if (rt_ibe & DRTB_FLAG) { + do_rtb(dc); + } else { + do_rte(dc); + } } /* Complete the branch, ending the TB. */ @@ -1723,8 +1724,12 @@ static void mb_tr_translate_insn(DisasContextBase *dcb, CPUState *cs) */ break; case DISAS_NEXT: - /* Normal insn a delay slot. */ - dc->base.is_jmp = DISAS_JUMP; + /* + * Normal insn a delay slot. + * However, the return-from-exception type insns should + * return to the main loop, as they have adjusted MSR. + */ + dc->base.is_jmp = (rt_ibe ? DISAS_EXIT_JUMP : DISAS_JUMP); break; case DISAS_EXIT_NEXT: /*