From patchwork Wed May 19 12:51:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 442412 Delivered-To: patch@linaro.org Received: by 2002:a02:7a1b:0:0:0:0:0 with SMTP id a27csp1311196jac; Wed, 19 May 2021 06:15:51 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzW2xr3by+Cx+/2t9jk/U1ui0UG/8EC1btZM0mzySSHmVg1+Fn1CreCcvbnoUqxvA7fkS/S X-Received: by 2002:a92:ddc6:: with SMTP id d6mr9201185ilr.51.1621430151653; Wed, 19 May 2021 06:15:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1621430151; cv=none; d=google.com; s=arc-20160816; b=C44wpwteYXEeTs1bsIk/QPaE24O6h4MOUelQsrNjv5ZFdff0OS3CYJa8Z8jJUdNvAA d7ExGKEM4nBPiurbT/xuhCl57To/LtRblJcX9GersIvWPspgnXjTrYJBAR5c1VmdDPo9 U7OfEKWkzHyqiQLpfNqpi6l4a+yKBARZ5d2rywqXOeXYUuHQw0SL/i5WkB7UYFj1kEQ2 y56AOxwLTJKC/XdWn4yI/jKV2NyHuxj+1Pr/AWhP1s0IlDWectQeEMz+f6eQE3E657UR 6r0l2MvsnbA/zbIbrcFxIIKfl8m4RRf0BdYex0oXdNWqL962o02hG7ghqz60vET/8kf7 ndLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=2jVANcJab572HVrS9VkHXFkC63A6pYLNfcJP0XY6nMg=; b=Mw44F3v3s0SIiGFIs+PnLin3eKStna0KCDB4bUUEyQ/jiIPe8VvFBm/pLv+IG6Chdf Njp7348YN/JOD9NPJBgUWBHM5XOiTOHcgI25UbBapnwlqtHcWu5+1Tns9E2QpxDPIunc qGyeymfiqAaKaDS/oVBWysUfiennSgwYZKvLR01sZ6UFCff4hfKufJsqr2fjBXaGck1k fIFxO4biq8c+J9ucbkLMu9BN32MCkp+X0RIidiJFUD/sdI7lYpDsfoZkoZSDQApI0DL+ 2YtNLYhMsOYeJ5XZ2fwPC4FtqELeiQ3dfPr74T23iFGgOfGahJ+LLs0CTAp+s2EpvG/U RIFQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=F4ZlgN5p; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id o67si27657676jao.17.2021.05.19.06.15.51 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Wed, 19 May 2021 06:15:51 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gibson.dropbear.id.au header.s=201602 header.b=F4ZlgN5p; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:38766 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ljM3D-0005ZN-1Y for patch@linaro.org; Wed, 19 May 2021 09:15:51 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:33658) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhh-0002FU-SK; Wed, 19 May 2021 08:53:39 -0400 Received: from ozlabs.org ([203.11.71.1]:43805) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ljLhf-0001VL-5L; Wed, 19 May 2021 08:53:36 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FlXnm5q53z9t5K; Wed, 19 May 2021 22:52:12 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1621428732; bh=IYhSONt3HOWROP9fH1P2QTeEPObXAsaix9l2v2Bmjac=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=F4ZlgN5pOWLDPXSSVu27PqlSQnyd+DDXWPG+YsjagQyVSzBrHioul7gYFoM4VVy2W YyQHTg3xBPgImiUz3hW67wxKv5vwrBbmETX+1LVZPG6TVgXZCVTrLeziKw6Oqvi3uh 0wQYsf+zHMftt/RngsdjEVwIeaq9lmCPk03Hq2hE= From: David Gibson To: peter.maydell@linaro.org, groug@kaod.org Subject: [PULL 36/48] target/ppc: Use MMUAccessType in mmu-hash64.c Date: Wed, 19 May 2021 22:51:36 +1000 Message-Id: <20210519125148.27720-37-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210519125148.27720-1-david@gibson.dropbear.id.au> References: <20210519125148.27720-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.25, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: richard.henderson@linaro.org, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Richard Henderson We must leave the 'int rwx' parameter to ppc_hash64_handle_mmu_fault for now, but will clean that up later. Signed-off-by: Ricgard Henderson Message-Id: <20210518201146.794854-4-richard.henderson@linaro.org> Signed-off-by: David Gibson --- target/ppc/mmu-hash64.c | 61 ++++++++++++++++++++++++++--------------- 1 file changed, 39 insertions(+), 22 deletions(-) -- 2.31.1 diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index d5b70ddc9c..f48b625f48 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -877,10 +877,12 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, hwaddr ptex; ppc_hash_pte64_t pte; int exec_prot, pp_prot, amr_prot, prot; + MMUAccessType access_type; int need_prot; hwaddr raddr; assert((rwx == 0) || (rwx == 1) || (rwx == 2)); + access_type = rwx; /* * Note on LPCR usage: 970 uses HID4, but our special variant of @@ -891,7 +893,7 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, */ /* 1. Handle real mode accesses */ - if (((rwx == 2) && (msr_ir == 0)) || ((rwx != 2) && (msr_dr == 0))) { + if (access_type == MMU_INST_FETCH ? !msr_ir : !msr_dr) { /* * Translation is supposedly "off", but in real mode the top 4 * effective address bits are (mostly) ignored @@ -924,14 +926,19 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, /* Emulated old-style RMO mode, bounds check against RMLS */ if (raddr >= limit) { - if (rwx == 2) { + switch (access_type) { + case MMU_INST_FETCH: ppc_hash64_set_isi(cs, SRR1_PROTFAULT); - } else { - int dsisr = DSISR_PROTFAULT; - if (rwx == 1) { - dsisr |= DSISR_ISSTORE; - } - ppc_hash64_set_dsi(cs, eaddr, dsisr); + break; + case MMU_DATA_LOAD: + ppc_hash64_set_dsi(cs, eaddr, DSISR_PROTFAULT); + break; + case MMU_DATA_STORE: + ppc_hash64_set_dsi(cs, eaddr, + DSISR_PROTFAULT | DSISR_ISSTORE); + break; + default: + g_assert_not_reached(); } return 1; } @@ -954,13 +961,19 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, exit(1); } /* Segment still not found, generate the appropriate interrupt */ - if (rwx == 2) { + switch (access_type) { + case MMU_INST_FETCH: cs->exception_index = POWERPC_EXCP_ISEG; env->error_code = 0; - } else { + break; + case MMU_DATA_LOAD: + case MMU_DATA_STORE: cs->exception_index = POWERPC_EXCP_DSEG; env->error_code = 0; env->spr[SPR_DAR] = eaddr; + break; + default: + g_assert_not_reached(); } return 1; } @@ -968,7 +981,7 @@ int ppc_hash64_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, skip_slb_search: /* 3. Check for segment level no-execute violation */ - if ((rwx == 2) && (slb->vsid & SLB_VSID_N)) { + if (access_type == MMU_INST_FETCH && (slb->vsid & SLB_VSID_N)) { ppc_hash64_set_isi(cs, SRR1_NOEXEC_GUARD); return 1; } @@ -976,14 +989,18 @@ skip_slb_search: /* 4. Locate the PTE in the hash table */ ptex = ppc_hash64_htab_lookup(cpu, slb, eaddr, &pte, &apshift); if (ptex == -1) { - if (rwx == 2) { + switch (access_type) { + case MMU_INST_FETCH: ppc_hash64_set_isi(cs, SRR1_NOPTE); - } else { - int dsisr = DSISR_NOPTE; - if (rwx == 1) { - dsisr |= DSISR_ISSTORE; - } - ppc_hash64_set_dsi(cs, eaddr, dsisr); + break; + case MMU_DATA_LOAD: + ppc_hash64_set_dsi(cs, eaddr, DSISR_NOPTE); + break; + case MMU_DATA_STORE: + ppc_hash64_set_dsi(cs, eaddr, DSISR_NOPTE | DSISR_ISSTORE); + break; + default: + g_assert_not_reached(); } return 1; } @@ -997,11 +1014,11 @@ skip_slb_search: amr_prot = ppc_hash64_amr_prot(cpu, pte); prot = exec_prot & pp_prot & amr_prot; - need_prot = prot_for_access_type(rwx); + need_prot = prot_for_access_type(access_type); if (need_prot & ~prot) { /* Access right violation */ qemu_log_mask(CPU_LOG_MMU, "PTE access rejected\n"); - if (rwx == 2) { + if (access_type == MMU_INST_FETCH) { int srr1 = 0; if (PAGE_EXEC & ~exec_prot) { srr1 |= SRR1_NOEXEC_GUARD; /* Access violates noexec or guard */ @@ -1017,7 +1034,7 @@ skip_slb_search: if (need_prot & ~pp_prot) { dsisr |= DSISR_PROTFAULT; } - if (rwx == 1) { + if (access_type == MMU_DATA_STORE) { dsisr |= DSISR_ISSTORE; } if (need_prot & ~amr_prot) { @@ -1036,7 +1053,7 @@ skip_slb_search: ppc_hash64_set_r(cpu, ptex, pte.pte1); } if (!(pte.pte1 & HPTE64_R_C)) { - if (rwx == 1) { + if (access_type == MMU_DATA_STORE) { ppc_hash64_set_c(cpu, ptex, pte.pte1); } else { /*