From patchwork Tue Jun 1 15:01:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 451407 Delivered-To: patch@linaro.org Received: by 2002:a02:c735:0:0:0:0:0 with SMTP id h21csp1878158jao; Tue, 1 Jun 2021 08:15:38 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxHckmEhF2qyjhQT3FcGOu/k9TAeSRst96oSUbVZZonklc96f4tDFC3W8od9tWb8OKbDNZR X-Received: by 2002:a19:2d0f:: with SMTP id k15mr4730030lfj.237.1622560538562; Tue, 01 Jun 2021 08:15:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622560538; cv=none; d=google.com; s=arc-20160816; b=U3lErtnCVbktpqmGd5sjbtCfs/+oeplokdhE/NY0Vkls8ThVIib1JYqBKpmive26vn JRIkXnzo32/ECjNi3mpgT8670on9yA+CCW/v+bgviGb+Fv9hKleHYTFEJ+YfwZ23Sed3 K30TjsfkPYfhtpmW13CBleVydrhALIfdaiJ3UKxs4FyjUAICM+jwT13YyeSeCwrZRJKW OYqfA7e3fTEfE9R9BZAPI8zAq+ERvekGr9uLQi4O3H4GZ36Tu71OWwxTtE66qZ5EMj+T NdQMQFE9DhkGvexRGaAZa2V1x+uPvlmzfKq0u0koHnRFO4UGl9DMll5mTrbq3PzawKU4 rOmA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=FnlsR+WZ/wh0XCcNKaHActmkwxmy9chqA5pOHI4KJO8=; b=WaEhiveya/3Br7VLlYBN2kZ6+kcIsjs2g/FtVfv7E7Xq7IBQX+esN2hwvEq1Fk/KDb zerLruRm+JsgaukPyjz36+qdtNJo/xSycQ4EHQ4KldMliFDKEyiwt6qGssL7l4CbRxfW wda23wpCpAYRTaaGG7NuqJsF9rePqZLXs+E2o56GzH0R9clq2Yyg/CecSGGem8SkFucR ehXlXC1VnF4CvX11EUP5NX/9jW6MPiaFMyXelADmxwOv3hAzmimB1D5/W2QDI8wElAt3 hqpdRZV0woWEhdace/ETE64ULk/ThcqMx4VP0M4fav2TMngjaHLsPRRT+33kYVrApRoI dsAg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Luv0k11D; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id v7si19088380lfr.456.2021.06.01.08.15.38 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 01 Jun 2021 08:15:38 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Luv0k11D; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:49404 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lo67F-0005pR-B2 for patch@linaro.org; Tue, 01 Jun 2021 11:15:37 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36828) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lo5u7-0002jO-4B for qemu-devel@nongnu.org; Tue, 01 Jun 2021 11:02:03 -0400 Received: from mail-io1-xd2a.google.com ([2607:f8b0:4864:20::d2a]:46653) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1lo5to-0002lC-SN for qemu-devel@nongnu.org; Tue, 01 Jun 2021 11:02:02 -0400 Received: by mail-io1-xd2a.google.com with SMTP id o21so15620743iow.13 for ; Tue, 01 Jun 2021 08:01:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id:in-reply-to:references:mime-version :content-transfer-encoding; bh=FnlsR+WZ/wh0XCcNKaHActmkwxmy9chqA5pOHI4KJO8=; b=Luv0k11DSMAR+lUzSZXq/PS7I8noyYEQRpSGcbpuls1RkaMry8+9Goy/n52tLQv69n U6CltkmNku3n5n7FG2XIDTfcH1Le6kE654BOHFZ9HMxLXYeSaUjjKSFJEA9A/jxdtW93 cF8PLnXjCM89hJuvDn3VvBgqrDSFJkQ5NxzS16jmIwe/UeyXb9S2pZCnp5G6OgsY5v+g S1iAA93hD5Wg+5DwdojuAHl7xe3xVC/6Bqd9XZ7VPQ5SeiD9tCnpeV7jFRJesc8dycGa GO53HCZsf/8QVRkrImLhSQl0Gaq2QL6wmd+cd5HyFLCvhzZeB2JzpLBV8uz/dNym2jYp 3JHw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=FnlsR+WZ/wh0XCcNKaHActmkwxmy9chqA5pOHI4KJO8=; b=H5xtZjUS7nIDPiqrEWYJ4IQeLPImWn/c3cuEfaFdoleIBunrDkjLFo4hjf5GnTK45V jsH16Hek8pVKcpjBq4qxNWuY8EobHTrXs6Xa5PhAywIKQYBoiwFCNcZmL+dBH4Sw+FrT ubHE8KEjiSIa6nopLa/pA8eFWqYOGr3bhcFutg4hPCiz1enYxkFBRABeWXCwLtbsU5hX 5CN7IuHLC7J8sFO+Eo6Iw0lc4T1wElGdsMEo9yWLYfAmS+Kb8psqDZkpv1Y1KLvuS0oN j0+h5V/HnCJ2jGFrsxlG2tJZYZoXWpEF1tkjLR2nubQ60horltmIozM6/q1x/b4eawlK 7IMA== X-Gm-Message-State: AOAM5321jxYRn79qtiQPY8xGiLIoQ84ldawpiMdgrTcZo/eHZv4kMzJP Uy3Ii1poTUtU4rIU9y4PfL5SiNk+5z4hVVzz X-Received: by 2002:a02:b107:: with SMTP id r7mr26526185jah.8.1622559701120; Tue, 01 Jun 2021 08:01:41 -0700 (PDT) Received: from localhost.localdomain ([2607:fb90:806c:3e8a:9cf0:b3be:5e07:b99f]) by smtp.gmail.com with ESMTPSA id f8sm4109909ilj.37.2021.06.01.08.01.40 for (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Jun 2021 08:01:40 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v7 24/27] Revert "tcg/tci: Use exec/cpu_ldst.h interfaces" Date: Tue, 1 Jun 2021 08:01:03 -0700 Message-Id: <20210601150106.12761-25-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210601150106.12761-1-richard.henderson@linaro.org> References: <20210601150106.12761-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::d2a; envelope-from=richard.henderson@linaro.org; helo=mail-io1-xd2a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This reverts commit dc09f047eddec8f4a1991c4f5f4a428d7aa3f2c0. For tcg, tracepoints are expanded inline in tcg opcodes. Using a helper which generates a second tracepoint is incorrect. For system mode, the extraction and re-packing of MemOp and mmu_idx lost the alignment information from MemOp. So we were no longer raising alignment exceptions for !TARGET_ALIGNED_ONLY guests. This can be seen in tests/tcg/xtensa/test_load_store.S. For user mode, we must update to the new signature of g2h() so that the revert compiles. We can leave set_helper_retaddr for later. Signed-off-by: Richard Henderson --- tcg/tci.c | 73 ++++++++++++++++++++++++++++++++++--------------------- 1 file changed, 45 insertions(+), 28 deletions(-) -- 2.25.1 Reviewed-by: Philippe Mathieu-Daudé diff --git a/tcg/tci.c b/tcg/tci.c index 36558210a1..8b17b244bf 100644 --- a/tcg/tci.c +++ b/tcg/tci.c @@ -286,34 +286,51 @@ static bool tci_compare64(uint64_t u0, uint64_t u1, TCGCond condition) return result; } -#define qemu_ld_ub \ - cpu_ldub_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_ld_leuw \ - cpu_lduw_le_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_ld_leul \ - cpu_ldl_le_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_ld_leq \ - cpu_ldq_le_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_ld_beuw \ - cpu_lduw_be_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_ld_beul \ - cpu_ldl_be_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_ld_beq \ - cpu_ldq_be_mmuidx_ra(env, taddr, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_st_b(X) \ - cpu_stb_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_st_lew(X) \ - cpu_stw_le_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_st_lel(X) \ - cpu_stl_le_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_st_leq(X) \ - cpu_stq_le_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_st_bew(X) \ - cpu_stw_be_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_st_bel(X) \ - cpu_stl_be_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) -#define qemu_st_beq(X) \ - cpu_stq_be_mmuidx_ra(env, taddr, X, get_mmuidx(oi), (uintptr_t)tb_ptr) +#ifdef CONFIG_SOFTMMU +# define qemu_ld_ub \ + helper_ret_ldub_mmu(env, taddr, oi, (uintptr_t)tb_ptr) +# define qemu_ld_leuw \ + helper_le_lduw_mmu(env, taddr, oi, (uintptr_t)tb_ptr) +# define qemu_ld_leul \ + helper_le_ldul_mmu(env, taddr, oi, (uintptr_t)tb_ptr) +# define qemu_ld_leq \ + helper_le_ldq_mmu(env, taddr, oi, (uintptr_t)tb_ptr) +# define qemu_ld_beuw \ + helper_be_lduw_mmu(env, taddr, oi, (uintptr_t)tb_ptr) +# define qemu_ld_beul \ + helper_be_ldul_mmu(env, taddr, oi, (uintptr_t)tb_ptr) +# define qemu_ld_beq \ + helper_be_ldq_mmu(env, taddr, oi, (uintptr_t)tb_ptr) +# define qemu_st_b(X) \ + helper_ret_stb_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr) +# define qemu_st_lew(X) \ + helper_le_stw_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr) +# define qemu_st_lel(X) \ + helper_le_stl_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr) +# define qemu_st_leq(X) \ + helper_le_stq_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr) +# define qemu_st_bew(X) \ + helper_be_stw_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr) +# define qemu_st_bel(X) \ + helper_be_stl_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr) +# define qemu_st_beq(X) \ + helper_be_stq_mmu(env, taddr, X, oi, (uintptr_t)tb_ptr) +#else +# define qemu_ld_ub ldub_p(g2h(env_cpu(env), taddr)) +# define qemu_ld_leuw lduw_le_p(g2h(env_cpu(env), taddr)) +# define qemu_ld_leul (uint32_t)ldl_le_p(g2h(env_cpu(env), taddr)) +# define qemu_ld_leq ldq_le_p(g2h(env_cpu(env), taddr)) +# define qemu_ld_beuw lduw_be_p(g2h(env_cpu(env), taddr)) +# define qemu_ld_beul (uint32_t)ldl_be_p(g2h(env_cpu(env), taddr)) +# define qemu_ld_beq ldq_be_p(g2h(env_cpu(env), taddr)) +# define qemu_st_b(X) stb_p(g2h(env_cpu(env), taddr), X) +# define qemu_st_lew(X) stw_le_p(g2h(env_cpu(env), taddr), X) +# define qemu_st_lel(X) stl_le_p(g2h(env_cpu(env), taddr), X) +# define qemu_st_leq(X) stq_le_p(g2h(env_cpu(env), taddr), X) +# define qemu_st_bew(X) stw_be_p(g2h(env_cpu(env), taddr), X) +# define qemu_st_bel(X) stl_be_p(g2h(env_cpu(env), taddr), X) +# define qemu_st_beq(X) stq_be_p(g2h(env_cpu(env), taddr), X) +#endif static uint64_t tci_qemu_ld(CPUArchState *env, target_ulong taddr, TCGMemOpIdx oi, const void *tb_ptr)