diff mbox series

[10/11] hw/gpio/pl061: Document a shortcoming in our implementation

Message ID 20210702104018.19881-11-peter.maydell@linaro.org
State Superseded
Headers show
Series hw/arm: Make virt board secure powerdown/reset work | expand

Commit Message

Peter Maydell July 2, 2021, 10:40 a.m. UTC
The Luminary PL061s in the Stellaris LM3S9695 don't all have the same
reset value for GPIOPUR.  We can get away with not letting the board
configure the PUR reset value because we don't actually wire anything
up to the lines which should reset to pull-up.  Add a comment noting
this omission.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

---
Not worth actually fixing, but I wanted a note since I spotted this
while I was reading the datasheet anyway.
---
 hw/gpio/pl061.c | 9 +++++++++
 1 file changed, 9 insertions(+)

-- 
2.20.1

Comments

Philippe Mathieu-Daudé July 2, 2021, 10:57 a.m. UTC | #1
On 7/2/21 12:40 PM, Peter Maydell wrote:
> The Luminary PL061s in the Stellaris LM3S9695 don't all have the same

> reset value for GPIOPUR.  We can get away with not letting the board

> configure the PUR reset value because we don't actually wire anything

> up to the lines which should reset to pull-up.  Add a comment noting

> this omission.

> 

> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

> ---

> Not worth actually fixing, but I wanted a note since I spotted this

> while I was reading the datasheet anyway.

> ---

>  hw/gpio/pl061.c | 9 +++++++++

>  1 file changed, 9 insertions(+)


Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
diff mbox series

Patch

diff --git a/hw/gpio/pl061.c b/hw/gpio/pl061.c
index 8d12b2d6b97..2cb3a231b43 100644
--- a/hw/gpio/pl061.c
+++ b/hw/gpio/pl061.c
@@ -455,6 +455,15 @@  static void pl061_enter_reset(Object *obj, ResetType type)
     trace_pl061_reset(DEVICE(s)->canonical_path);
 
     /* reset values from PL061 TRM, Stellaris LM3S5P31 & LM3S8962 Data Sheet */
+
+    /*
+     * FIXME: For the LM3S6965, not all of the PL061 instances have the
+     * same reset values for GPIOPUR, GPIOAFSEL and GPIODEN, so in theory
+     * we should allow the board to configure these via properties.
+     * In practice, we don't wire anything up to the affected GPIO lines
+     * (PB7, PC0, PC1, PC2, PC3 -- they're used for JTAG), so we can
+     * get away with this inaccuracy.
+     */
     s->data = 0;
     s->old_in_data = 0;
     s->dir = 0;