From patchwork Sat Sep 18 18:45:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 514257 Delivered-To: patch@linaro.org Received: by 2002:a02:c816:0:0:0:0:0 with SMTP id p22csp687569jao; Sat, 18 Sep 2021 12:27:21 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzSbKTMpbkhzlXqCvtmJonbCXYlyEnP+ksvyJI16b/3+7qX7MirkjcPdoDjriwptHnF39DM X-Received: by 2002:a92:4a10:: with SMTP id m16mr12678471ilf.91.1631993241683; Sat, 18 Sep 2021 12:27:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1631993241; cv=none; d=google.com; s=arc-20160816; b=mmh6DkMrJJxcT3RGUjUMKSoamKYa/5772wP4sM/RjBYXQ8cTN+q0XaGKUR/ifSAWYI uFpe3E58hK2yskG23mmLqzUa0w0sq3oeOgxlhnC7qecyOzbzb9R0xe8PhgvFezi99GdV pSarLP15ISAP9mPbl0buFQOqyBIMDjvXnld/ZNiJIbh8oje6O8SWvI3s0CjAq1B67GWl jDWiEnrC6CVfaUA/w3WgXsb6ioynyiA1RfcxKkikSlJLCBBAEw/4wKsX0LjJR2qTDIom E5Hgl8Vl20oudWhfXGiLpJUmvHxyze2utEijMIVL1NrrcaDs3mMjqLFyGRZFYceA+w5Y lH/A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=gr1Yuwax54Nh89kDqsASWK4djVgjs7rSxRSreX+dYpg=; b=FUJcZjAYZ+UmGKc8kAx290PAouSePIwg3Ac1X3tiwlfNMvlRdHDq4kiIVhaFHPIadk Gc+G2dMq2npKSkDjCce3tM23iUY80MLmQAYoCWaN9S5ZBquXjjpzTUS3EIHk8v/4iuQ9 lCaww8PRdZtIqyqMVtdFRHemlLuNnKXsHfjqEjmclbHc0FtUdVJQz6IQBMYO3gwRUrRA U/EFfjb8OIZfu2WsIdPTMFQOoqN3L2z4IVr6R2lSBBI8Ynt5Gc9Z+4wMwKZALTSrIFs7 Jc2S5eAa8TvbtRj5c/gi48geZj0ygSFsmsnyUwTih9nIupzYlVyXFhyTmZzf7QyHDvaN kQrQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kUeshxtZ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id s18si8989047ilj.28.2021.09.18.12.27.21 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sat, 18 Sep 2021 12:27:21 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kUeshxtZ; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:50682 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mRfzd-000503-1Y for patch@linaro.org; Sat, 18 Sep 2021 15:27:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:54664) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mRfLp-0005O8-Qt for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:16 -0400 Received: from mail-pj1-x1032.google.com ([2607:f8b0:4864:20::1032]:42813) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mRfLi-0006ya-RG for qemu-devel@nongnu.org; Sat, 18 Sep 2021 14:46:13 -0400 Received: by mail-pj1-x1032.google.com with SMTP id p12-20020a17090adf8c00b0019c959bc795so4165128pjv.1 for ; Sat, 18 Sep 2021 11:46:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gr1Yuwax54Nh89kDqsASWK4djVgjs7rSxRSreX+dYpg=; b=kUeshxtZGZYrHMuYDZiehg4SmI4nXrIGdmK4B2c6hyJEYt9Spr5IDDHmyzACWH9Lyx 6QbH2g+7VMZrWXcZXSl5iNcnKD2edHrZEex0MREXodzXcp1wUJVyR8lfhc6murxotSRu 9ZkWbxHTiojkj6pBbVXkZl52yeEOt4Qo67kdYnJE65+A94/0gNJZDRw7pJpRW6DX+tc+ /oxZ/e82SgEKkOnFn8VQ5gqLDmz1RiXeKFRdX162ICjRA2jrhikrmxTQPFzAgfU9Z2Ie uo13NFIC4ZaX+DRSqBdjqkZNdHOYY9dRecbfGyBAfg1lPaRscR6GH8yZJLUKFqhgGB/5 JXEQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gr1Yuwax54Nh89kDqsASWK4djVgjs7rSxRSreX+dYpg=; b=pROxxZ2yPpqw0MPHL8uHkayi/6sKETlFkFAAzXbe0ADi22Ps8xzYoWIzSfs1ZHUe2h W1CTw9LUzzoOiFElKipo9wa1ve+Gc3UtkTrs4URPLTutRY9vhP3CEE5gQVwdoop8Qp0V NRFkfJD5/A3jJqyzQyYBjPZ7dNuPO69VN0/TvypQ5sqtN8QtzDPKo9w7OTFSS/4aClr1 TPOp9dg6MXcOenFLz4vmn9VzguKt6xk2GMpkEoxRbhYmXr2/Ru3i+PwUbeb1WorBsgJ1 6f7bH4EFERuI37LtXlXUyg0EUTFXFOBoJTFBGrFvkR3WSrAfv8RJA22iAy6Hy6SUVyA/ YLEQ== X-Gm-Message-State: AOAM531q1mCXPf8t08o1uUO7/UQVm7tlmgmo4yPLG9fBitYi2i0NcMLe 8XvAJ/0vJ+1wHCYbVS+NbUsit72yXEcQAQ== X-Received: by 2002:a17:90a:d686:: with SMTP id x6mr19597660pju.227.1631990760060; Sat, 18 Sep 2021 11:46:00 -0700 (PDT) Received: from localhost.localdomain ([71.212.134.125]) by smtp.gmail.com with ESMTPSA id y26sm9555858pfe.69.2021.09.18.11.45.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 18 Sep 2021 11:45:59 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PATCH v2 38/41] target/sh4: Make sh4_cpu_tlb_fill sysemu only Date: Sat, 18 Sep 2021 11:45:24 -0700 Message-Id: <20210918184527.408540-39-richard.henderson@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210918184527.408540-1-richard.henderson@linaro.org> References: <20210918184527.408540-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::1032; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1032.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: laurent@vivier.eu Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The fallback code in raise_sigsegv is sufficient for sh4. Remove the code from cpu_loop that raised SIGSEGV. Signed-off-by: Richard Henderson --- target/sh4/cpu.h | 6 +++--- linux-user/sh4/cpu_loop.c | 8 -------- target/sh4/cpu.c | 2 +- target/sh4/helper.c | 9 +-------- 4 files changed, 5 insertions(+), 20 deletions(-) -- 2.25.1 diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index 56f7c32df9..17458587a5 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -213,12 +213,12 @@ void superh_cpu_do_unaligned_access(CPUState *cpu, vaddr addr, int mmu_idx, uintptr_t retaddr); void sh4_translate_init(void); +void sh4_cpu_list(void); + +#if !defined(CONFIG_USER_ONLY) bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr); - -void sh4_cpu_list(void); -#if !defined(CONFIG_USER_ONLY) void superh_cpu_do_interrupt(CPUState *cpu); bool superh_cpu_exec_interrupt(CPUState *cpu, int int_req); void cpu_sh4_invalidate_tlb(CPUSH4State *s); diff --git a/linux-user/sh4/cpu_loop.c b/linux-user/sh4/cpu_loop.c index 222ed1c670..8408d0c42d 100644 --- a/linux-user/sh4/cpu_loop.c +++ b/linux-user/sh4/cpu_loop.c @@ -63,14 +63,6 @@ void cpu_loop(CPUSH4State *env) info.si_code = TARGET_TRAP_BRKPT; queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); break; - case 0xa0: - case 0xc0: - info.si_signo = TARGET_SIGSEGV; - info.si_errno = 0; - info.si_code = TARGET_SEGV_MAPERR; - info._sifields._sigfault._addr = env->tea; - queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); - break; case EXCP_ATOMIC: cpu_exec_step_atomic(cs); arch_interrupt = false; diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index fb2116dc52..0cc1542681 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -237,10 +237,10 @@ static const struct SysemuCPUOps sh4_sysemu_ops = { static const struct TCGCPUOps superh_tcg_ops = { .initialize = sh4_translate_init, .synchronize_from_tb = superh_cpu_synchronize_from_tb, - .tlb_fill = superh_cpu_tlb_fill, #ifndef CONFIG_USER_ONLY .has_work = superh_cpu_has_work, + .tlb_fill = superh_cpu_tlb_fill, .cpu_exec_interrupt = superh_cpu_exec_interrupt, .do_interrupt = superh_cpu_do_interrupt, .do_unaligned_access = superh_cpu_do_unaligned_access, diff --git a/target/sh4/helper.c b/target/sh4/helper.c index 53cb9c3b63..6a620e36fc 100644 --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -796,8 +796,6 @@ bool superh_cpu_exec_interrupt(CPUState *cs, int interrupt_request) return false; } -#endif /* !CONFIG_USER_ONLY */ - bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr) @@ -806,11 +804,6 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size, CPUSH4State *env = &cpu->env; int ret; -#ifdef CONFIG_USER_ONLY - ret = (access_type == MMU_DATA_STORE ? MMU_DTLB_VIOLATION_WRITE : - access_type == MMU_INST_FETCH ? MMU_ITLB_VIOLATION : - MMU_DTLB_VIOLATION_READ); -#else target_ulong physical; int prot; @@ -829,7 +822,6 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size, if (ret != MMU_DTLB_MULTIPLE && ret != MMU_ITLB_MULTIPLE) { env->pteh = (env->pteh & PTEH_ASID_MASK) | (address & PTEH_VPN_MASK); } -#endif env->tea = address; switch (ret) { @@ -868,3 +860,4 @@ bool superh_cpu_tlb_fill(CPUState *cs, vaddr address, int size, } cpu_loop_exit_restore(cs, retaddr); } +#endif /* !CONFIG_USER_ONLY */