| Message ID | 20220303202341.2232284-6-peter.maydell@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | arm gicv3: minor bug fixes, ITS trace events | expand |
On 3/3/22 10:23, Peter Maydell wrote: > The trace_gicv3_icv_hppir_read trace event takes an integer value > which it uses to form the register name, which should be either > ICV_HPPIR0 or ICV_HPPIR1. We were passing in the 'grp' variable for > this, but that is either GICV3_G0 or GICV3_G1NS, which happen to be 0 > and 2, which meant that tracing for the ICV_HPPIR1 register was > incorrectly printed as ICV_HPPIR2. > > Use the same approach we do for all the other similar trace events, > and pass in 'ri->crm == 8 ? 0 : 1', deriving the index value > directly from the ARMCPRegInfo struct. > > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/hw/intc/arm_gicv3_cpuif.c b/hw/intc/arm_gicv3_cpuif.c index d7e03d0cab8..1a3d440a54b 100644 --- a/hw/intc/arm_gicv3_cpuif.c +++ b/hw/intc/arm_gicv3_cpuif.c @@ -612,7 +612,8 @@ static uint64_t icv_hppir_read(CPUARMState *env, const ARMCPRegInfo *ri) } } - trace_gicv3_icv_hppir_read(grp, gicv3_redist_affid(cs), value); + trace_gicv3_icv_hppir_read(ri->crm == 8 ? 0 : 1, + gicv3_redist_affid(cs), value); return value; }
The trace_gicv3_icv_hppir_read trace event takes an integer value which it uses to form the register name, which should be either ICV_HPPIR0 or ICV_HPPIR1. We were passing in the 'grp' variable for this, but that is either GICV3_G0 or GICV3_G1NS, which happen to be 0 and 2, which meant that tracing for the ICV_HPPIR1 register was incorrectly printed as ICV_HPPIR2. Use the same approach we do for all the other similar trace events, and pass in 'ri->crm == 8 ? 0 : 1', deriving the index value directly from the ARMCPRegInfo struct. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- hw/intc/arm_gicv3_cpuif.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)