diff mbox series

[v5,11/48] target/nios2: Do not zero the general registers on reset

Message ID 20220310112725.570053-12-richard.henderson@linaro.org
State New
Headers show
Series target/nios2: Shadow register set, EIC and VIC | expand

Commit Message

Richard Henderson March 10, 2022, 11:26 a.m. UTC 
The bulk of the general register set is undefined on reset.

The zero register is for the most part special-cased in translate,
but the slot is still exposed to gdbstub and nios2_cpu_dump_state,
so continue to make sure that's zeroed.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/nios2/cpu.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

Comments

Peter Maydell March 10, 2022, 12:21 p.m. UTC | #1 
On Thu, 10 Mar 2022 at 11:27, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> The bulk of the general register set is undefined on reset.

They might be architecturally undefined, but for QEMU's
purposes we want the state of the CPU on reset to be
identical to the state it is in when QEMU is first started.

thanks
-- PMM
Richard Henderson March 10, 2022, 6:45 p.m. UTC | #2 
On 3/10/22 04:21, Peter Maydell wrote:
> On Thu, 10 Mar 2022 at 11:27, Richard Henderson
> <richard.henderson@linaro.org> wrote:
>>
>> The bulk of the general register set is undefined on reset.
> 
> They might be architecturally undefined, but for QEMU's
> purposes we want the state of the CPU on reset to be
> identical to the state it is in when QEMU is first started.

Ok, I've dropped this.

The intent had been to remove a user/sysemu difference when we get to introducing shadow 
regs, but it isn't that big of a deal.


r~
diff mbox series

Patch

diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c
index 182ddcc18f..97bdc0a61b 100644
--- a/target/nios2/cpu.c
+++ b/target/nios2/cpu.c
@@ -53,16 +53,16 @@  static void nios2_cpu_reset(DeviceState *dev)
 
     ncc->parent_reset(dev);
 
-    memset(env->regs, 0, sizeof(env->regs));
     memset(env->ctrl, 0, sizeof(env->ctrl));
-    env->pc = cpu->reset_addr;
-
 #if defined(CONFIG_USER_ONLY)
     /* Start in user mode with interrupts enabled. */
     env->ctrl[CR_STATUS] = CR_STATUS_U | CR_STATUS_PIE;
 #else
     env->ctrl[CR_STATUS] = 0;
 #endif
+
+    env->regs[R_ZERO] = 0;
+    env->pc = cpu->reset_addr;
 }
 
 #ifndef CONFIG_USER_ONLY