diff mbox series

[v1,05/15] accel/tcg: add tb_invalidate_phy_pages_fast tracepoint

Message ID 20220408164742.2844631-6-alex.bennee@linaro.org
State New
Headers show
Series testing, docs, tracepoints and cputlb hacks | expand

Commit Message

Alex Bennée April 8, 2022, 4:47 p.m. UTC 
These events can be very expensive for the translator so lets add a
tracepoint to help with debugging what might be causing them. Clean up
the comments while we are at it.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
---
 accel/tcg/translate-all.c | 15 +++++++++++----
 accel/tcg/trace-events    |  1 +
 2 files changed, 12 insertions(+), 4 deletions(-)

Comments

Richard Henderson April 9, 2022, 3:57 p.m. UTC | #1 
On 4/8/22 09:47, Alex Bennée wrote:
> These events can be very expensive for the translator so lets add a
> tracepoint to help with debugging what might be causing them. Clean up
> the comments while we are at it.
> 
> Signed-off-by: Alex Bennée<alex.bennee@linaro.org>
> ---
>   accel/tcg/translate-all.c | 15 +++++++++++----
>   accel/tcg/trace-events    |  1 +
>   2 files changed, 12 insertions(+), 4 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
diff mbox series

Patch

diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
index 5971cd53ab..e9f1cc179d 100644
--- a/accel/tcg/translate-all.c
+++ b/accel/tcg/translate-all.c
@@ -1807,21 +1807,28 @@  void tb_invalidate_phys_range(target_ulong start, target_ulong end)
 }
 
 #ifdef CONFIG_SOFTMMU
-/* len must be <= 8 and start must be a multiple of len.
+/*
+ * len must be <= 8 and start must be a multiple of len.
  * Called via softmmu_template.h when code areas are written to with
  * iothread mutex not held.
  *
- * Call with all @pages in the range [@start, @start + len[ locked.
+ * Call with all @pages in the range [@start, @start + len] locked.
  */
 void tb_invalidate_phys_page_fast(struct page_collection *pages,
                                   tb_page_addr_t start, int len,
                                   uintptr_t retaddr)
 {
-    PageDesc *p;
+    PageDesc *p = page_find(start >> TARGET_PAGE_BITS);
+
+    if (trace_event_get_state_backends(TRACE_TB_INVALIDATE_PHYS_PAGE_FAST)) {
+        TranslationBlock *tb = tcg_tb_lookup(retaddr);
+        g_assert(tb);
+        trace_tb_invalidate_phys_page_fast(start, len, tb->pc,
+                                           p->code_write_count, p->code_bitmap);
+    }
 
     assert_memory_lock();
 
-    p = page_find(start >> TARGET_PAGE_BITS);
     if (!p) {
         return;
     }
diff --git a/accel/tcg/trace-events b/accel/tcg/trace-events
index 4e9b450520..f4d1321b1b 100644
--- a/accel/tcg/trace-events
+++ b/accel/tcg/trace-events
@@ -11,4 +11,5 @@  memory_notdirty_write_access(uint64_t vaddr, uint64_t ram_addr, unsigned size) "
 memory_notdirty_set_dirty(uint64_t vaddr) "0x%" PRIx64
 
 # translate-all.c
+tb_invalidate_phys_page_fast(uint64_t page_start, int len, uint64_t ret, int wc, void *bmap) "addr:0x%" PRIx64 "/%d pc:0x%" PRIx64" wc:%d/%p"
 translate_block(void *tb, uintptr_t pc, const void *tb_code) "tb:%p, pc:0x%"PRIxPTR", tb_code:%p"