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[174.21.142.130]) by smtp.gmail.com with ESMTPSA id j7-20020a056a00130700b004b9f7cd94a4sm16482827pfu.56.2022.04.26.11.19.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 26 Apr 2022 11:19:23 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Subject: [PULL 17/68] target/nios2: Split out helper for eret instruction Date: Tue, 26 Apr 2022 11:18:16 -0700 Message-Id: <20220426181907.103691-18-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220426181907.103691-1-richard.henderson@linaro.org> References: <20220426181907.103691-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42c; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x42c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Amir Gonnen Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" From: Amir Gonnen The implementation of eret will become much more complex with the introduction of shadow registers. [rth: Split out of a larger patch for shadow register sets. Directly exit to the cpu loop from the helper.] Reviewed-by: Peter Maydell Signed-off-by: Amir Gonnen Message-Id: <20220303153906.2024748-3-amir.gonnen@neuroblade.ai> Signed-off-by: Richard Henderson Message-Id: <20220421151735.31996-18-richard.henderson@linaro.org> --- target/nios2/helper.h | 1 + target/nios2/op_helper.c | 9 +++++++++ target/nios2/translate.c | 10 ++++++---- 3 files changed, 16 insertions(+), 4 deletions(-) diff --git a/target/nios2/helper.h b/target/nios2/helper.h index a44ecfdf7a..525b6b685b 100644 --- a/target/nios2/helper.h +++ b/target/nios2/helper.h @@ -21,6 +21,7 @@ DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, i32) #if !defined(CONFIG_USER_ONLY) +DEF_HELPER_3(eret, noreturn, env, i32, i32) DEF_HELPER_2(mmu_write_tlbacc, void, env, i32) DEF_HELPER_2(mmu_write_tlbmisc, void, env, i32) DEF_HELPER_2(mmu_write_pteaddr, void, env, i32) diff --git a/target/nios2/op_helper.c b/target/nios2/op_helper.c index caa885f7b4..ee5ad8b23f 100644 --- a/target/nios2/op_helper.c +++ b/target/nios2/op_helper.c @@ -30,3 +30,12 @@ void helper_raise_exception(CPUNios2State *env, uint32_t index) cs->exception_index = index; cpu_loop_exit(cs); } + +#ifndef CONFIG_USER_ONLY +void helper_eret(CPUNios2State *env, uint32_t new_status, uint32_t new_pc) +{ + env->regs[CR_STATUS] = new_status; + env->pc = new_pc; + cpu_loop_exit(env_cpu(env)); +} +#endif /* !CONFIG_USER_ONLY */ diff --git a/target/nios2/translate.c b/target/nios2/translate.c index 226bd9e30b..53699ee088 100644 --- a/target/nios2/translate.c +++ b/target/nios2/translate.c @@ -391,10 +391,12 @@ static void eret(DisasContext *dc, uint32_t code, uint32_t flags) return; } - tcg_gen_mov_tl(cpu_R[CR_STATUS], cpu_R[CR_ESTATUS]); - tcg_gen_mov_tl(cpu_pc, cpu_R[R_EA]); - - dc->base.is_jmp = DISAS_JUMP; +#ifdef CONFIG_USER_ONLY + g_assert_not_reached(); +#else + gen_helper_eret(cpu_env, cpu_R[CR_ESTATUS], cpu_R[R_EA]); + dc->base.is_jmp = DISAS_NORETURN; +#endif } /* PC <- ra */