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([122.255.60.245]) by smtp.gmail.com with ESMTPSA id y3-20020a17090a390300b001ef81bac701sm1782089pjb.42.2022.07.08.08.48.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 08 Jul 2022 08:48:10 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-arm@nongnu.org Subject: [RISU PATCH v4 21/29] aarch64: Use arch_init to configure sve Date: Fri, 8 Jul 2022 21:16:52 +0530 Message-Id: <20220708154700.18682-22-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220708154700.18682-1-richard.henderson@linaro.org> References: <20220708154700.18682-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::52d; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Adjust some of the aarch64 code to look at the reginfo struct instead of looking at test_sve, so that we do not need to pass the --test-sve option in order to dump sve trace files. Diagnose EINVAL as either cpu or kernel does not support SVE. Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell --- risu.h | 1 + risu.c | 3 +++ risu_reginfo_aarch64.c | 31 ++++++++++++++++++++----------- risu_reginfo_arm.c | 4 ++++ risu_reginfo_i386.c | 4 ++++ risu_reginfo_m68k.c | 4 ++++ risu_reginfo_ppc64.c | 4 ++++ 7 files changed, 40 insertions(+), 11 deletions(-) diff --git a/risu.h b/risu.h index 3cad3d5..bdb70c1 100644 --- a/risu.h +++ b/risu.h @@ -23,6 +23,7 @@ extern const struct option * const arch_long_opts; extern const char * const arch_extra_help; void process_arch_opt(int opt, const char *arg); +void arch_init(void); #define FIRST_ARCH_OPT 0x100 /* GCC computed include to pull in the correct risu_reginfo_*.h for diff --git a/risu.c b/risu.c index a70b778..1c096a8 100644 --- a/risu.c +++ b/risu.c @@ -617,6 +617,9 @@ int main(int argc, char **argv) load_image(imgfile); + /* E.g. select requested SVE vector length. */ + arch_init(); + if (ismaster) { return master(); } else { diff --git a/risu_reginfo_aarch64.c b/risu_reginfo_aarch64.c index 81a77ba..be47980 100644 --- a/risu_reginfo_aarch64.c +++ b/risu_reginfo_aarch64.c @@ -19,6 +19,7 @@ #include #include #include +#include #include #include "risu.h" @@ -37,8 +38,6 @@ const char * const arch_extra_help void process_arch_opt(int opt, const char *arg) { - long want, got; - assert(opt == FIRST_ARCH_OPT); test_sve = strtol(arg, 0, 10); @@ -46,16 +45,26 @@ void process_arch_opt(int opt, const char *arg) fprintf(stderr, "Invalid value for VQ (1-%d)\n", SVE_VQ_MAX); exit(EXIT_FAILURE); } - want = sve_vl_from_vq(test_sve); - got = prctl(PR_SVE_SET_VL, want); - if (want != got) { - if (got < 0) { - perror("prctl PR_SVE_SET_VL"); - } else { - fprintf(stderr, "Unsupported value for VQ (%d != %d)\n", - test_sve, (int)sve_vq_from_vl(got)); +} + +void arch_init(void) +{ + long want, got; + + if (test_sve) { + want = sve_vl_from_vq(test_sve); + got = prctl(PR_SVE_SET_VL, want); + if (want != got) { + if (got >= 0) { + fprintf(stderr, "Unsupported VQ for SVE (%d != %d)\n", + test_sve, (int)sve_vq_from_vl(got)); + } else if (errno == EINVAL) { + fprintf(stderr, "System does not support SVE\n"); + } else { + perror("prctl PR_SVE_SET_VL"); + } + exit(EXIT_FAILURE); } - exit(EXIT_FAILURE); } } diff --git a/risu_reginfo_arm.c b/risu_reginfo_arm.c index 47c52e8..202120b 100644 --- a/risu_reginfo_arm.c +++ b/risu_reginfo_arm.c @@ -36,6 +36,10 @@ void process_arch_opt(int opt, const char *arg) abort(); } +void arch_init(void) +{ +} + int reginfo_size(struct reginfo *ri) { return sizeof(*ri); diff --git a/risu_reginfo_i386.c b/risu_reginfo_i386.c index 50505ab..e9730be 100644 --- a/risu_reginfo_i386.c +++ b/risu_reginfo_i386.c @@ -74,6 +74,10 @@ void process_arch_opt(int opt, const char *arg) } } +void arch_init(void) +{ +} + int reginfo_size(struct reginfo *ri) { return sizeof(*ri); diff --git a/risu_reginfo_m68k.c b/risu_reginfo_m68k.c index 4eb30cd..4c25e77 100644 --- a/risu_reginfo_m68k.c +++ b/risu_reginfo_m68k.c @@ -23,6 +23,10 @@ void process_arch_opt(int opt, const char *arg) abort(); } +void arch_init(void) +{ +} + int reginfo_size(struct reginfo *ri) { return sizeof(*ri); diff --git a/risu_reginfo_ppc64.c b/risu_reginfo_ppc64.c index 39e8f1c..c80e387 100644 --- a/risu_reginfo_ppc64.c +++ b/risu_reginfo_ppc64.c @@ -32,6 +32,10 @@ void process_arch_opt(int opt, const char *arg) abort(); } +void arch_init(void) +{ +} + int reginfo_size(struct reginfo *ri) { return sizeof(*ri);