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[209.51.188.17]) by mx.google.com with ESMTPS id iw9-20020a0562140f2900b004acb01cd58fsi7127013qvb.486.2022.09.26.07.24.42 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Mon, 26 Sep 2022 07:24:42 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=plSly8c5; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:52708 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ocp2G-00020G-Uo for patch@linaro.org; Mon, 26 Sep 2022 10:24:41 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48176) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1ocoKH-00021K-FE for qemu-devel@nongnu.org; Mon, 26 Sep 2022 09:39:14 -0400 Received: from mail-wr1-x430.google.com ([2a00:1450:4864:20::430]:44882) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1ocoKD-0005eM-3b for qemu-devel@nongnu.org; Mon, 26 Sep 2022 09:39:12 -0400 Received: by mail-wr1-x430.google.com with SMTP id c11so10239473wrp.11 for ; Mon, 26 Sep 2022 06:39:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=V4i8lyUq3ft9QoTbl1zxUdvI+GWdEaQO+D0hzFqAlY0=; b=plSly8c5E/WG+nx6kAibnGo8ff7ST9cz2GuSc/wrfacIvaN2g1OKDcYHRZZB5OFtd2 FX6jLnBJ9hlRzvWbXwJn9Db6En14ei6b+NRTIBDzX4wtMn0XXhG0fZaWLBVbn3aV9K3O kJGo0lmwdU6ytTglIaxczE0TofqpfGIFflgaDgckjGnuqgmb54GonbEhnSDMcKbKG702 46H4Hs/HejcWCUy9bq82fA4JTBBe3rDV31GD/Usah70j8UHewBtVN08im1mhT50oS+LX ZkoOz8qjqNthFYmylQJlKI4KfJ/cs/yH6QDSggSOBa1ADM/HesTtfiwBR3eTkmrDCUBi 1ieg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=V4i8lyUq3ft9QoTbl1zxUdvI+GWdEaQO+D0hzFqAlY0=; b=bfe6u8ejnEr1Oub6zSxSpuSODHc35B6xGJoNqDqVMgLS95YBzzHxOvQCLfQt7Y9PxR 5ykbfRy9/e7ACARNYe44KlQa+pAQ/mjN7f0LtC8vSExjOc7d1iSNF6RM35kD94fdkTVX EPqMAQE4vvuGcRznSdahKl3lqzvYvcbplOalNb60No5N5QhDMDwvlidy1Q/+V+D5Ro0K voExa5jY5rlkHCwEkRicgIGT1D7jb+fkfLho9uNRas/rprHIqIwnuigKvTd3Axsj370J HWkuSTsiE1El6WEhyk6W2JWA2gzCvw0cFobvC7q4liOqrahgpiJyy4v3eKdU6RQukBLC yKKg== X-Gm-Message-State: ACrzQf3bEEKmQ/VQh3rC2wN+VxKJpruHcx5Wne7nZOSqCvtz/dx5fFrs 7Y5YDawO2CIziWtR/RsTOaLbcA== X-Received: by 2002:a5d:6808:0:b0:22a:c437:5b36 with SMTP id w8-20020a5d6808000000b0022ac4375b36mr13550393wru.459.1664199547707; Mon, 26 Sep 2022 06:39:07 -0700 (PDT) Received: from zen.linaroharston ([185.81.254.11]) by smtp.gmail.com with ESMTPSA id t12-20020a5d534c000000b0022c906ffedasm6660951wrv.70.2022.09.26.06.39.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Sep 2022 06:39:05 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id DA00B1FFBA; Mon, 26 Sep 2022 14:39:04 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: f4bug@amsat.org, mads@ynddal.dk, qemu-arm@nongnu.org, =?utf-8?q?Alex_Ben?= =?utf-8?q?n=C3=A9e?= , Peter Maydell Subject: [PATCH v2 02/11] target/arm: enable tracking of CPU index in MemTxAttrs Date: Mon, 26 Sep 2022 14:38:55 +0100 Message-Id: <20220926133904.3297263-3-alex.bennee@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220926133904.3297263-1-alex.bennee@linaro.org> References: <20220926133904.3297263-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::430; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x430.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Both arm_cpu_tlb_fill (for normal IO) and arm_cpu_get_phys_page_attrs_debug (for debug access) come through get_phys_addr which is setting the other memory attributes for the transaction. As these are all by definition CPU accesses we can also set the requested_type/index as appropriate. Signed-off-by: Alex Bennée --- target/arm/ptw.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 3261039d93..644d450662 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -2315,6 +2315,9 @@ bool get_phys_addr(CPUARMState *env, target_ulong address, { ARMMMUIdx s1_mmu_idx = stage_1_mmu_idx(mmu_idx); + attrs->requester_type = MEMTXATTRS_CPU; + attrs->requester_id = env_cpu(env)->cpu_index; + if (mmu_idx != s1_mmu_idx) { /* * Call ourselves recursively to do the stage 1 and then stage 2