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([2602:47:d49d:ec01:9ad0:4307:7d39:bb61]) by smtp.gmail.com with ESMTPSA id y6-20020a17090ad0c600b00205f4f7a3b3sm1905086pjw.21.2022.10.05.20.44.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 05 Oct 2022 20:44:41 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org Subject: [PATCH 20/26] target/s390x: Split per_breaking_event from per_branch_* Date: Wed, 5 Oct 2022 20:44:15 -0700 Message-Id: <20221006034421.1179141-21-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20221006034421.1179141-1-richard.henderson@linaro.org> References: <20221006034421.1179141-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::102f; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x102f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This allows us to update gbea before other updates to psw_addr, which will be important for TARGET_TB_PCREL. Signed-off-by: Richard Henderson Reviewed-by: Ilya Leoshkevich --- target/s390x/tcg/translate.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/target/s390x/tcg/translate.c b/target/s390x/tcg/translate.c index 498dc2930d..a2315ac73e 100644 --- a/target/s390x/tcg/translate.c +++ b/target/s390x/tcg/translate.c @@ -353,7 +353,6 @@ static inline bool per_enabled(DisasContext *s) static void per_branch_dest(DisasContext *s, TCGv_i64 dest) { #ifndef CONFIG_USER_ONLY - gen_psw_addr_disp(s, gbea, 0); if (s->base.tb->flags & FLAG_MASK_PER) { gen_helper_per_branch(cpu_env, gbea, dest); } @@ -363,7 +362,6 @@ static void per_branch_dest(DisasContext *s, TCGv_i64 dest) static void per_branch_disp(DisasContext *s, int64_t disp) { #ifndef CONFIG_USER_ONLY - gen_psw_addr_disp(s, gbea, 0); if (s->base.tb->flags & FLAG_MASK_PER) { TCGv_i64 dest = tcg_temp_new_i64(); gen_psw_addr_disp(s, dest, disp); @@ -1153,13 +1151,14 @@ struct DisasInsn { static DisasJumpType help_goto_direct(DisasContext *s, int64_t disp) { + per_breaking_event(s); + if (disp == s->ilen) { per_branch_disp(s, disp); return DISAS_NEXT; } if (use_goto_tb(s, s->base.pc_next + disp)) { update_cc_op(s); - per_breaking_event(s); tcg_gen_goto_tb(0); update_psw_addr_disp(s, disp); tcg_gen_exit_tb(s->base.tb, 0); @@ -1173,6 +1172,7 @@ static DisasJumpType help_goto_direct(DisasContext *s, int64_t disp) static DisasJumpType help_goto_indirect(DisasContext *s, TCGv_i64 dest) { + per_breaking_event(s); tcg_gen_mov_i64(psw_addr, dest); per_branch_dest(s, psw_addr); return DISAS_PC_UPDATED; @@ -1233,6 +1233,7 @@ static DisasJumpType help_branch(DisasContext *s, DisasCompare *c, } /* Branch taken. */ + per_breaking_event(s); if (is_imm) { gen_psw_addr_disp(s, psw_addr, disp); }