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[209.51.188.17]) by mx.google.com with ESMTPS id 13-20020a05621420ed00b004bb92787ecfsi2874935qvk.108.2022.10.30.15.30.04 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Sun, 30 Oct 2022 15:30:04 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WrMW5TNs; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1opGng-0008RL-Rq; Sun, 30 Oct 2022 18:29:04 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1opGnd-0008Qn-1a for qemu-devel@nongnu.org; Sun, 30 Oct 2022 18:29:01 -0400 Received: from mail-wr1-x432.google.com ([2a00:1450:4864:20::432]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1opGnb-00079Q-IJ for qemu-devel@nongnu.org; Sun, 30 Oct 2022 18:29:00 -0400 Received: by mail-wr1-x432.google.com with SMTP id cl5so2012992wrb.9 for ; Sun, 30 Oct 2022 15:28:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=O/ZLYSk+OjcEsO3vBVVMrJYzy07G1uKsEbRMLQcl2HQ=; b=WrMW5TNsSJaYTNH/LHchTmjkwGWBvgBPef4OVpwyvhHupElyx7G2jlfYUxvF2+kEOG NFvLzdDq0a+tyD/bgktezsCIbcl7R2PpsMVd+6AJKer7N+/A8gZF/stpJ+qm7vKFlYEj qSsJFepemLGN+EA4zVT32V1BbPgDG+z9q87/kTgG8UgEqtu8Fu7PMAsGukSBB7nM67Uu KmfyL6xzFRadmJqq4PGmuQ7SbGjeYrRdQC1WhoLyE1KyK4X1Q8MYJ5ciFsFnwcQd1+gz +ZACaOVL709vifeqclOYfqKQvM5iV+Wa9BFYgpWXMWrsL1aURlmnaxJuUqy5+t4k54zk /POw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=O/ZLYSk+OjcEsO3vBVVMrJYzy07G1uKsEbRMLQcl2HQ=; b=TSS7fCTgeQjj++bs0ucbd8m5Qux7Lx4gTMlGthQ572NSWhBbQG0MqI64IKNawCp1j2 cx4Ex5X/V08oPRhvlioN1nDEq5s9/nrEkaymdEzbmbtCJ1CHjZPENiJuOKBtSVCrPySk BkvHHwqrGx+kQwm0mziCWu1G5ghB0tXEbffI2Zc+ZYStWIKV/4bGBkmK0ViiMUDo9yuG sEfXTUtvnfqsBrznEK8/o8OniGRjTxDrjumLZFn2unltDlopWymap4A8WLUmP7Rnl9e5 ZahnjzYaWc29qirIhiveBEdEg8NO5BPph6YODTDjx3KG93Cok+0AuVSvi4QMTAj/2lmb bTaQ== X-Gm-Message-State: ACrzQf0icUHgS9L2GcZEMJbJRzLAoJQ557crEJVTEdwJl+cVTdvbM+XX Z0A1mmGX9u0G+7Hd5rR8Ki9JEooN3TAd7A== X-Received: by 2002:a5d:6a81:0:b0:236:65a0:e7d9 with SMTP id s1-20020a5d6a81000000b0023665a0e7d9mr6048643wru.327.1667168938669; Sun, 30 Oct 2022 15:28:58 -0700 (PDT) Received: from localhost.localdomain ([185.126.107.38]) by smtp.gmail.com with ESMTPSA id v11-20020a05600c444b00b003c70191f267sm5460721wmn.39.2022.10.30.15.28.57 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Sun, 30 Oct 2022 15:28:58 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Aleksandar Rikalo , Huacai Chen , Stefan Pejic , Jiaxun Yang , Aurelien Jarno , Paul Burton , Bernhard Beschow , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PULL 02/55] hw/isa/vt82c686: Resolve unneeded attribute Date: Sun, 30 Oct 2022 23:27:48 +0100 Message-Id: <20221030222841.42377-3-philmd@linaro.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20221030222841.42377-1-philmd@linaro.org> References: <20221030222841.42377-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::432; envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org From: Bernhard Beschow Now that also the super io device is realized in the common realize method, the isa_bus attribute can be turned into a temporary. Signed-off-by: Bernhard Beschow Reviewed-by: Philippe Mathieu-Daudé Message-Id: <20220901114127.53914-3-shentey@gmail.com> Signed-off-by: Philippe Mathieu-Daudé --- hw/isa/vt82c686.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c index 0217c98fe4..9d12e1cae4 100644 --- a/hw/isa/vt82c686.c +++ b/hw/isa/vt82c686.c @@ -543,7 +543,6 @@ struct ViaISAState { PCIDevice dev; qemu_irq cpu_intr; qemu_irq *isa_irqs; - ISABus *isa_bus; ViaSuperIOState via_sio; }; @@ -585,17 +584,18 @@ static void via_isa_realize(PCIDevice *d, Error **errp) ViaISAState *s = VIA_ISA(d); DeviceState *dev = DEVICE(d); qemu_irq *isa_irq; + ISABus *isa_bus; int i; qdev_init_gpio_out(dev, &s->cpu_intr, 1); isa_irq = qemu_allocate_irqs(via_isa_request_i8259_irq, s, 1); - s->isa_bus = isa_bus_new(dev, get_system_memory(), pci_address_space_io(d), + isa_bus = isa_bus_new(dev, get_system_memory(), pci_address_space_io(d), &error_fatal); - s->isa_irqs = i8259_init(s->isa_bus, *isa_irq); - isa_bus_irqs(s->isa_bus, s->isa_irqs); - i8254_pit_init(s->isa_bus, 0x40, 0, NULL); - i8257_dma_init(s->isa_bus, 0); - mc146818_rtc_init(s->isa_bus, 2000, NULL); + s->isa_irqs = i8259_init(isa_bus, *isa_irq); + isa_bus_irqs(isa_bus, s->isa_irqs); + i8254_pit_init(isa_bus, 0x40, 0, NULL); + i8257_dma_init(isa_bus, 0); + mc146818_rtc_init(isa_bus, 2000, NULL); for (i = 0; i < PCI_CONFIG_HEADER_SIZE; i++) { if (i < PCI_COMMAND || i >= PCI_REVISION_ID) { @@ -604,7 +604,7 @@ static void via_isa_realize(PCIDevice *d, Error **errp) } /* Super I/O */ - if (!qdev_realize(DEVICE(&s->via_sio), BUS(s->isa_bus), errp)) { + if (!qdev_realize(DEVICE(&s->via_sio), BUS(isa_bus), errp)) { return; } }