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Iglesias" , =?utf-8?q?C=C3=A9dric_Le_Go?= =?utf-8?q?ater?= , Alistair Francis , qemu-arm@nongnu.org, Tyrone Ting Subject: [PATCH 4/6] hw/arm/npcm7xx: Remove tswap32() calls and constify smpboot[] Date: Thu, 22 Dec 2022 22:55:47 +0100 Message-Id: <20221222215549.86872-5-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20221222215549.86872-1-philmd@linaro.org> References: <20221222215549.86872-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::629; envelope-from=philmd@linaro.org; helo=mail-ej1-x629.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org ARM CPUs fetch instructions in little-endian. smpboot[] encoded instructions are written in little-endian. We call tswap32() on the array. tswap32 function swap a 32-bit value if the target endianness doesn't match the host one. Otherwise it is a NOP. * On a little-endian host, the array is stored as it. tswap32() is a NOP, and the vCPU fetches the instructions as it, in little-endian. * On a big-endian host, the array is stored as it. tswap32() swap the instructions to little-endian, and the vCPU fetches the instructions as it, in little-endian. Using tswap() on system emulation is a bit odd: while the target particularities might change the system emulation, the host ones (such its endianness) shouldn't interfere. We can simplify by using const_le32() to always store the instructions in the array in little-endian, removing the need for the dubious tswap(). Signed-off-by: Philippe Mathieu-Daudé --- Note there is still a tswap() call in npcm7xx_init_fuses() --- hw/arm/npcm7xx.c | 49 ++++++++++++++++++++---------------------------- 1 file changed, 20 insertions(+), 29 deletions(-) diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c index d85cc02765..2976192731 100644 --- a/hw/arm/npcm7xx.c +++ b/hw/arm/npcm7xx.c @@ -291,22 +291,18 @@ static const struct { static void npcm7xx_write_board_setup(ARMCPU *cpu, const struct arm_boot_info *info) { - uint32_t board_setup[] = { - 0xe59f0010, /* ldr r0, clk_base_addr */ - 0xe59f1010, /* ldr r1, pllcon1_value */ - 0xe5801010, /* str r1, [r0, #16] */ - 0xe59f100c, /* ldr r1, clksel_value */ - 0xe5801004, /* str r1, [r0, #4] */ - 0xe12fff1e, /* bx lr */ - NPCM7XX_CLK_BA, - NPCM7XX_PLLCON1_FIXUP_VAL, - NPCM7XX_CLKSEL_FIXUP_VAL, + static const uint32_t board_setup[] = { + const_le32(0xe59f0010), /* ldr r0, clk_base_addr */ + const_le32(0xe59f1010), /* ldr r1, pllcon1_value */ + const_le32(0xe5801010), /* str r1, [r0, #16] */ + const_le32(0xe59f100c), /* ldr r1, clksel_value */ + const_le32(0xe5801004), /* str r1, [r0, #4] */ + const_le32(0xe12fff1e), /* bx lr */ + const_le32(NPCM7XX_CLK_BA), + const_le32(NPCM7XX_PLLCON1_FIXUP_VAL), + const_le32(NPCM7XX_CLKSEL_FIXUP_VAL), }; - int i; - for (i = 0; i < ARRAY_SIZE(board_setup); i++) { - board_setup[i] = tswap32(board_setup[i]); - } rom_add_blob_fixed("board-setup", board_setup, sizeof(board_setup), info->board_setup_addr); } @@ -321,22 +317,17 @@ static void npcm7xx_write_secondary_boot(ARMCPU *cpu, * we need to provide our own smpboot stub that can not use 'wfi', it has * to spin the secondary CPU until the first CPU writes to the SCRPAD reg. */ - uint32_t smpboot[] = { - 0xe59f2018, /* ldr r2, bootreg_addr */ - 0xe3a00000, /* mov r0, #0 */ - 0xe5820000, /* str r0, [r2] */ - 0xe320f002, /* wfe */ - 0xe5921000, /* ldr r1, [r2] */ - 0xe1110001, /* tst r1, r1 */ - 0x0afffffb, /* beq */ - 0xe12fff11, /* bx r1 */ - NPCM7XX_SMP_BOOTREG_ADDR, + static const uint32_t smpboot[] = { + const_le32(0xe59f2018), /* ldr r2, bootreg_addr */ + const_le32(0xe3a00000), /* mov r0, #0 */ + const_le32(0xe5820000), /* str r0, [r2] */ + const_le32(0xe320f002), /* wfe */ + const_le32(0xe5921000), /* ldr r1, [r2] */ + const_le32(0xe1110001), /* tst r1, r1 */ + const_le32(0x0afffffb), /* beq */ + const_le32(0xe12fff11), /* bx r1 */ + const_le32(NPCM7XX_SMP_BOOTREG_ADDR), }; - int i; - - for (i = 0; i < ARRAY_SIZE(smpboot); i++) { - smpboot[i] = tswap32(smpboot[i]); - } rom_add_blob_fixed("smpboot", smpboot, sizeof(smpboot), NPCM7XX_SMP_LOADER_START);