| Message ID | 20221230113504.37032-4-philmd@linaro.org |
|---|---|
| State | Accepted |
| Commit | f8ad895824860b1c18f1fd64e566d66ce70a61cd |
| Headers | show |
| Series | hw/arm/aspeed_ast10x0: Map more peripherals & few more fixes | expand |
On Fri, Dec 30, 2022 at 12:34:56PM +0100, Philippe Mathieu-Daudé wrote: > Add more Aspeed watchdog registers from [*]. > > Since guests can righteously access them, log the access at > 'unimplemented' level instead of 'guest-errors'. > > [*] https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/drivers/watchdog/wdt_aspeed.c#L31 > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Delevoryas <peter@pjd.dev> > --- > hw/watchdog/wdt_aspeed.c | 13 +++++++++++++ > include/hw/watchdog/wdt_aspeed.h | 2 +- > 2 files changed, 14 insertions(+), 1 deletion(-) > > diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c > index eefca31ae4..d267aa185c 100644 > --- a/hw/watchdog/wdt_aspeed.c > +++ b/hw/watchdog/wdt_aspeed.c > @@ -42,6 +42,11 @@ > #define WDT_PUSH_PULL_MAGIC (0xA8 << 24) > #define WDT_OPEN_DRAIN_MAGIC (0x8A << 24) > #define WDT_RESET_MASK1 (0x1c / 4) > +#define WDT_RESET_MASK2 (0x20 / 4) > + > +#define WDT_SW_RESET_CTRL (0x24 / 4) > +#define WDT_SW_RESET_MASK1 (0x28 / 4) > +#define WDT_SW_RESET_MASK2 (0x2c / 4) > > #define WDT_TIMEOUT_STATUS (0x10 / 4) > #define WDT_TIMEOUT_CLEAR (0x14 / 4) > @@ -83,6 +88,10 @@ static uint64_t aspeed_wdt_read(void *opaque, hwaddr offset, unsigned size) > return s->regs[WDT_RESET_MASK1]; > case WDT_TIMEOUT_STATUS: > case WDT_TIMEOUT_CLEAR: > + case WDT_RESET_MASK2: > + case WDT_SW_RESET_CTRL: > + case WDT_SW_RESET_MASK1: > + case WDT_SW_RESET_MASK2: > qemu_log_mask(LOG_UNIMP, > "%s: uninmplemented read at offset 0x%" HWADDR_PRIx "\n", > __func__, offset); > @@ -190,6 +199,10 @@ static void aspeed_wdt_write(void *opaque, hwaddr offset, uint64_t data, > > case WDT_TIMEOUT_STATUS: > case WDT_TIMEOUT_CLEAR: > + case WDT_RESET_MASK2: > + case WDT_SW_RESET_CTRL: > + case WDT_SW_RESET_MASK1: > + case WDT_SW_RESET_MASK2: > qemu_log_mask(LOG_UNIMP, > "%s: uninmplemented write at offset 0x%" HWADDR_PRIx "\n", > __func__, offset); > diff --git a/include/hw/watchdog/wdt_aspeed.h b/include/hw/watchdog/wdt_aspeed.h > index db91ee6b51..e90ef86651 100644 > --- a/include/hw/watchdog/wdt_aspeed.h > +++ b/include/hw/watchdog/wdt_aspeed.h > @@ -21,7 +21,7 @@ OBJECT_DECLARE_TYPE(AspeedWDTState, AspeedWDTClass, ASPEED_WDT) > #define TYPE_ASPEED_2600_WDT TYPE_ASPEED_WDT "-ast2600" > #define TYPE_ASPEED_1030_WDT TYPE_ASPEED_WDT "-ast1030" > > -#define ASPEED_WDT_REGS_MAX (0x20 / 4) > +#define ASPEED_WDT_REGS_MAX (0x30 / 4) > > struct AspeedWDTState { > /*< private >*/ > -- > 2.38.1 >
On 12/30/22 12:34, Philippe Mathieu-Daudé wrote: > Add more Aspeed watchdog registers from [*]. > > Since guests can righteously access them, log the access at > 'unimplemented' level instead of 'guest-errors'. > > [*] https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/drivers/watchdog/wdt_aspeed.c#L31 > > Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> LGTM. We need to decide how to address the #regs per soc. I would introduce a class attribute and define ASPEED_WDT_REGS_MAX as the maximum of all, or possibly allocate the regs array in the realize routine. This is a little more work. Thanks, C. > --- > hw/watchdog/wdt_aspeed.c | 13 +++++++++++++ > include/hw/watchdog/wdt_aspeed.h | 2 +- > 2 files changed, 14 insertions(+), 1 deletion(-) > > diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c > index eefca31ae4..d267aa185c 100644 > --- a/hw/watchdog/wdt_aspeed.c > +++ b/hw/watchdog/wdt_aspeed.c > @@ -42,6 +42,11 @@ > #define WDT_PUSH_PULL_MAGIC (0xA8 << 24) > #define WDT_OPEN_DRAIN_MAGIC (0x8A << 24) > #define WDT_RESET_MASK1 (0x1c / 4) > +#define WDT_RESET_MASK2 (0x20 / 4) > + > +#define WDT_SW_RESET_CTRL (0x24 / 4) > +#define WDT_SW_RESET_MASK1 (0x28 / 4) > +#define WDT_SW_RESET_MASK2 (0x2c / 4) > > #define WDT_TIMEOUT_STATUS (0x10 / 4) > #define WDT_TIMEOUT_CLEAR (0x14 / 4) > @@ -83,6 +88,10 @@ static uint64_t aspeed_wdt_read(void *opaque, hwaddr offset, unsigned size) > return s->regs[WDT_RESET_MASK1]; > case WDT_TIMEOUT_STATUS: > case WDT_TIMEOUT_CLEAR: > + case WDT_RESET_MASK2: > + case WDT_SW_RESET_CTRL: > + case WDT_SW_RESET_MASK1: > + case WDT_SW_RESET_MASK2: > qemu_log_mask(LOG_UNIMP, > "%s: uninmplemented read at offset 0x%" HWADDR_PRIx "\n", > __func__, offset); > @@ -190,6 +199,10 @@ static void aspeed_wdt_write(void *opaque, hwaddr offset, uint64_t data, > > case WDT_TIMEOUT_STATUS: > case WDT_TIMEOUT_CLEAR: > + case WDT_RESET_MASK2: > + case WDT_SW_RESET_CTRL: > + case WDT_SW_RESET_MASK1: > + case WDT_SW_RESET_MASK2: > qemu_log_mask(LOG_UNIMP, > "%s: uninmplemented write at offset 0x%" HWADDR_PRIx "\n", > __func__, offset); > diff --git a/include/hw/watchdog/wdt_aspeed.h b/include/hw/watchdog/wdt_aspeed.h > index db91ee6b51..e90ef86651 100644 > --- a/include/hw/watchdog/wdt_aspeed.h > +++ b/include/hw/watchdog/wdt_aspeed.h > @@ -21,7 +21,7 @@ OBJECT_DECLARE_TYPE(AspeedWDTState, AspeedWDTClass, ASPEED_WDT) > #define TYPE_ASPEED_2600_WDT TYPE_ASPEED_WDT "-ast2600" > #define TYPE_ASPEED_1030_WDT TYPE_ASPEED_WDT "-ast1030" > > -#define ASPEED_WDT_REGS_MAX (0x20 / 4) > +#define ASPEED_WDT_REGS_MAX (0x30 / 4) > > struct AspeedWDTState { > /*< private >*/
diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c index eefca31ae4..d267aa185c 100644 --- a/hw/watchdog/wdt_aspeed.c +++ b/hw/watchdog/wdt_aspeed.c @@ -42,6 +42,11 @@ #define WDT_PUSH_PULL_MAGIC (0xA8 << 24) #define WDT_OPEN_DRAIN_MAGIC (0x8A << 24) #define WDT_RESET_MASK1 (0x1c / 4) +#define WDT_RESET_MASK2 (0x20 / 4) + +#define WDT_SW_RESET_CTRL (0x24 / 4) +#define WDT_SW_RESET_MASK1 (0x28 / 4) +#define WDT_SW_RESET_MASK2 (0x2c / 4) #define WDT_TIMEOUT_STATUS (0x10 / 4) #define WDT_TIMEOUT_CLEAR (0x14 / 4) @@ -83,6 +88,10 @@ static uint64_t aspeed_wdt_read(void *opaque, hwaddr offset, unsigned size) return s->regs[WDT_RESET_MASK1]; case WDT_TIMEOUT_STATUS: case WDT_TIMEOUT_CLEAR: + case WDT_RESET_MASK2: + case WDT_SW_RESET_CTRL: + case WDT_SW_RESET_MASK1: + case WDT_SW_RESET_MASK2: qemu_log_mask(LOG_UNIMP, "%s: uninmplemented read at offset 0x%" HWADDR_PRIx "\n", __func__, offset); @@ -190,6 +199,10 @@ static void aspeed_wdt_write(void *opaque, hwaddr offset, uint64_t data, case WDT_TIMEOUT_STATUS: case WDT_TIMEOUT_CLEAR: + case WDT_RESET_MASK2: + case WDT_SW_RESET_CTRL: + case WDT_SW_RESET_MASK1: + case WDT_SW_RESET_MASK2: qemu_log_mask(LOG_UNIMP, "%s: uninmplemented write at offset 0x%" HWADDR_PRIx "\n", __func__, offset); diff --git a/include/hw/watchdog/wdt_aspeed.h b/include/hw/watchdog/wdt_aspeed.h index db91ee6b51..e90ef86651 100644 --- a/include/hw/watchdog/wdt_aspeed.h +++ b/include/hw/watchdog/wdt_aspeed.h @@ -21,7 +21,7 @@ OBJECT_DECLARE_TYPE(AspeedWDTState, AspeedWDTClass, ASPEED_WDT) #define TYPE_ASPEED_2600_WDT TYPE_ASPEED_WDT "-ast2600" #define TYPE_ASPEED_1030_WDT TYPE_ASPEED_WDT "-ast1030" -#define ASPEED_WDT_REGS_MAX (0x20 / 4) +#define ASPEED_WDT_REGS_MAX (0x30 / 4) struct AspeedWDTState { /*< private >*/
Add more Aspeed watchdog registers from [*]. Since guests can righteously access them, log the access at 'unimplemented' level instead of 'guest-errors'. [*] https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/drivers/watchdog/wdt_aspeed.c#L31 Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> --- hw/watchdog/wdt_aspeed.c | 13 +++++++++++++ include/hw/watchdog/wdt_aspeed.h | 2 +- 2 files changed, 14 insertions(+), 1 deletion(-)