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([2607:fb90:8060:51a2:184b:6e49:c396:be2]) by smtp.gmail.com with ESMTPSA id v2-20020a05620a440200b006fed2788751sm23042354qkp.76.2023.01.03.10.17.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Jan 2023 10:17:31 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Cc: pbonzini@redhat.com, berrange@redhat.com, eduardo@habkost.net, armbru@redhat.com, ajones@ventanamicro.com, alex.bennee@linaro.org Subject: [RFC PATCH 14/40] target/arm: Rename arm_cpu_mp_affinity Date: Tue, 3 Jan 2023 10:16:20 -0800 Message-Id: <20230103181646.55711-15-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230103181646.55711-1-richard.henderson@linaro.org> References: <20230103181646.55711-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::a2a; envelope-from=richard.henderson@linaro.org; helo=mail-vk1-xa2a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Rename to arm_build_mp_affinity. This frees up the name for other usage, and emphasizes that the cpu object is not involved. Signed-off-by: Richard Henderson Reviewed-by: Philippe Mathieu-Daudé --- target/arm/cpu.h | 2 +- hw/arm/npcm7xx.c | 2 +- hw/arm/sbsa-ref.c | 2 +- hw/arm/virt.c | 2 +- target/arm/cpu.c | 6 +++--- 5 files changed, 7 insertions(+), 7 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 2d9bddf197..dd72519fda 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -1037,7 +1037,7 @@ struct ArchCPU { unsigned int gt_cntfrq_period_ns(ARMCPU *cpu); -uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz); +uint64_t arm_build_mp_affinity(int idx, uint8_t clustersz); #ifndef CONFIG_USER_ONLY extern const VMStateDescription vmstate_arm_cpu; diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c index d85cc02765..41124b7444 100644 --- a/hw/arm/npcm7xx.c +++ b/hw/arm/npcm7xx.c @@ -462,7 +462,7 @@ static void npcm7xx_realize(DeviceState *dev, Error **errp) /* CPUs */ for (i = 0; i < nc->num_cpus; i++) { object_property_set_int(OBJECT(&s->cpu[i]), "mp-affinity", - arm_cpu_mp_affinity(i, NPCM7XX_MAX_NUM_CPUS), + arm_build_mp_affinity(i, NPCM7XX_MAX_NUM_CPUS), &error_abort); object_property_set_int(OBJECT(&s->cpu[i]), "reset-cbar", NPCM7XX_GIC_CPU_IF_ADDR, &error_abort); diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sbsa-ref.c index 4bb444684f..06fd4b6fb0 100644 --- a/hw/arm/sbsa-ref.c +++ b/hw/arm/sbsa-ref.c @@ -165,7 +165,7 @@ static bool cpu_type_valid(const char *cpu) static uint64_t sbsa_ref_cpu_mp_affinity(SBSAMachineState *sms, int idx) { uint8_t clustersz = ARM_DEFAULT_CPUS_PER_CLUSTER; - return arm_cpu_mp_affinity(idx, clustersz); + return arm_build_mp_affinity(idx, clustersz); } /* diff --git a/hw/arm/virt.c b/hw/arm/virt.c index ea2413a0ba..3642604dea 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1700,7 +1700,7 @@ static uint64_t virt_cpu_mp_affinity(VirtMachineState *vms, int idx) clustersz = GICV3_TARGETLIST_BITS; } } - return arm_cpu_mp_affinity(idx, clustersz); + return arm_build_mp_affinity(idx, clustersz); } static inline bool *virt_get_high_memmap_enabled(VirtMachineState *vms, diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 8463c45d87..a104a77165 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -1171,7 +1171,7 @@ static void arm_cpu_dump_state(CPUState *cs, FILE *f, int flags) } } -uint64_t arm_cpu_mp_affinity(int idx, uint8_t clustersz) +uint64_t arm_build_mp_affinity(int idx, uint8_t clustersz) { uint32_t Aff1 = idx / clustersz; uint32_t Aff0 = idx % clustersz; @@ -1927,8 +1927,8 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp) * so these bits always RAZ. */ if (cpu->mp_affinity == ARM64_AFFINITY_INVALID) { - cpu->mp_affinity = arm_cpu_mp_affinity(cs->cpu_index, - ARM_DEFAULT_CPUS_PER_CLUSTER); + cpu->mp_affinity = arm_build_mp_affinity(cs->cpu_index, + ARM_DEFAULT_CPUS_PER_CLUSTER); } if (cpu->reset_hivecs) {