From patchwork Fri May 19 17:04:47 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 683914 Delivered-To: patch@linaro.org Received: by 2002:a5d:4e01:0:0:0:0:0 with SMTP id p1csp1053361wrt; Fri, 19 May 2023 10:07:39 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ4ByPkyWthbakk2P0fI6OkpIse05E8SRjW/HiKynVm04osWxNmq4f+eDtiUjUkc/OMwTLbo X-Received: by 2002:a05:6214:e8e:b0:61d:be1e:7c4e with SMTP id hf14-20020a0562140e8e00b0061dbe1e7c4emr5964182qvb.12.1684516059496; Fri, 19 May 2023 10:07:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1684516059; cv=none; d=google.com; s=arc-20160816; b=AGZUUb8N89E6y8jmrBxjpfOC6RGEwc1aU63PBwQDuuskPFV8bCY1WYPlSWtSrqj0qI KJXq6Jmt3yJMXShH0/95ROENZwOS7Rbi0COJMBvRaL8W/uuMNA/ptp7pcsuyDjoJwINM 5vYsidnYUlHZvxoqI1grm2Cjv0D7Y7Z3RW1InIiL1hqfEegUPXOb2JmCPYsHXnjqAfc6 JmmyJjqciRDd8UcVzLQXnC2EtPUSdnZJGhyPRYyVorNUMNENVm8i9d5HgZCR2V+ci/10 mBHqonszg3Tczz80gDXXTXRxjkeTCM9kiz2TaX7NvfYpXw59EFrI/IJHocKzFIlFPT2i zfyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=yg00DZfe+F7dr7y3vEVOv3SJnj/XXqqhg6oEcb/MIUE=; b=mjhc2awD/xtXkSkZ1XfWF9SfpP9SqM/+2JtJSBn0CryF9xAncwg9Z18xS6543jW92+ OOmlXk4VTsx+5b8oK97Smc2wW/PfQccGwmMgiGoz+S/ULIQ5Jiv5O+cPXDjvPYYN9u5Y 1m5BquOZtwwzg8oObyuZ1xjGfdo0LY2Oyi+j5zsdIq8vagqMjrHRWaXX7dMOquxlFTy0 L15rJM+CFx2SRl3QtH62YuhD0UyQ+owEx8exX24J6BRiQaPiiBdJthkk4n6sgxDZx0IM heaXnxYS1rc5AxAJhs9u+Sk06fkxzQd3dYaSL3roxyxeA3fMCBc7xSgzyeNUWfiZxUOX Bt9w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KcBEl6YG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id u7-20020ae9c007000000b007596780d546si2814549qkk.372.2023.05.19.10.07.39 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Fri, 19 May 2023 10:07:39 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KcBEl6YG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1q03Xd-0002HT-LO; Fri, 19 May 2023 13:05:21 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1q03XO-0002BU-A2 for qemu-devel@nongnu.org; Fri, 19 May 2023 13:05:07 -0400 Received: from mail-wr1-x42e.google.com ([2a00:1450:4864:20::42e]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1q03XG-0005Tx-Hi for qemu-devel@nongnu.org; Fri, 19 May 2023 13:05:06 -0400 Received: by mail-wr1-x42e.google.com with SMTP id ffacd0b85a97d-3093a778089so2362732f8f.1 for ; Fri, 19 May 2023 10:04:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1684515896; x=1687107896; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=yg00DZfe+F7dr7y3vEVOv3SJnj/XXqqhg6oEcb/MIUE=; b=KcBEl6YGiZuGjt8SqzMhHNVxP8yR/cPVhwv54wsHXjjWabkjD1ptkpKt53l1z2+PNC tXxYuBjMJ9Ql/QkVCOhcMCxxUfCISIJ8HaSv8UyBNbPSdEjexAZwsuI1N2LXHKEc8fIZ ytjTetekfopNnVKK0SQFLOtBk7Qht0l9pzEjqJFGrx5P/9CPmUegmhM+uTXycDtTNkYH DJcQ85rIh8V+E+/8JvkMPbyzTymtRoKcnhhfKUliWurof5NY+6nvgj1m+LDowsUKC9QH 7UvMTLOlNx3PFkkUYdVOiNVZ5HebK/2oS9Y41drPyMwcEQT0McLNF3aifbus0/SWaHR8 L8NA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1684515896; x=1687107896; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=yg00DZfe+F7dr7y3vEVOv3SJnj/XXqqhg6oEcb/MIUE=; b=CZzw8ELFWGpp1drJQsWs3R9CNiuHnwCs2e8yffDVvxd5HHZZP9ULqVlSNFq74MO51S TMkv28OA7XeqqyeiG6YFD6FpN86r2TmHpqMcRbz9VaHRg3QLGPtghfL+f5LgeIdcT+HU BWQAul7pIY4cNVs+OeRMhPsVdBHnwxxxgsN3EPr2TLj2QlGs4DDrCWXdphB6yvW4IclQ E+iuyLgurZ4V1EEgMLth2b1QScFEWQZpG5D1jhiOH+9UDoaXs2dRvf7kGlUQddYnh1K1 /ltmIdUdMc9OHPUlaadddk3SNMXJUEz2EXbyUeMq7bcjzZKzMX6o9GXBoSt5LnmUDwK9 1MwA== X-Gm-Message-State: AC+VfDzhZ9zNGg9LmMmI0KNlBt3wnWq8rU0gve6xbeeeXWNBU9qRlOIb TktaYS53XSN54u34vs8LsQcYRA== X-Received: by 2002:a05:6000:1010:b0:307:834f:7159 with SMTP id a16-20020a056000101000b00307834f7159mr2812482wrx.4.1684515896127; Fri, 19 May 2023 10:04:56 -0700 (PDT) Received: from zen.linaroharston ([85.9.250.243]) by smtp.gmail.com with ESMTPSA id g9-20020adfe409000000b002ceacff44c7sm5776973wrm.83.2023.05.19.10.04.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 19 May 2023 10:04:55 -0700 (PDT) Received: from zen.lan (localhost [127.0.0.1]) by zen.linaroharston (Postfix) with ESMTP id C540C1FFBC; Fri, 19 May 2023 18:04:54 +0100 (BST) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Cc: =?utf-8?q?Alex_Benn=C3=A9e?= , Yanan Wang , Riku Voipio , Laurent Vivier , Marcel Apfelbaum , Marco Liebel , Mark Burton , Thomas Huth , Peter Maydell , Richard Henderson , Eduardo Habkost , Paolo Bonzini , qemu-arm@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Alexandre Iooss , Mahmoud Mandour , Robert Henry , Aaron Lindsay Subject: [PATCH 1/8] plugins: force slow path when plugins instrument memory ops Date: Fri, 19 May 2023 18:04:47 +0100 Message-Id: <20230519170454.2353945-2-alex.bennee@linaro.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230519170454.2353945-1-alex.bennee@linaro.org> References: <20230519170454.2353945-1-alex.bennee@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42e; envelope-from=alex.bennee@linaro.org; helo=mail-wr1-x42e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org The lack of SVE memory instrumentation has been an omission in plugin handling since it was introduced. Fortunately we can utilise the probe_* functions to force all all memory access to follow the slow path. We do this by checking the access type and presence of plugin memory callbacks and if set return the TLB_MMIO flag. We have to jump through a few hoops in user mode to re-use the flag but it was the desired effect: ./qemu-system-aarch64 -display none -serial mon:stdio \ -M virt -cpu max -semihosting-config enable=on \ -kernel ./tests/tcg/aarch64-softmmu/memory-sve \ -plugin ./contrib/plugins/libexeclog.so,ifilter=st1w,afilter=0x40001808 -d plugin gives (disas doesn't currently understand st1w): 0, 0x40001808, 0xe54342a0, ".byte 0xa0, 0x42, 0x43, 0xe5", store, 0x40213010, RAM, store, 0x40213014, RAM, store, 0x40213018, RAM And for user-mode: ./qemu-aarch64 \ -plugin contrib/plugins/libexeclog.so,afilter=0x4007c0 \ -d plugin \ ./tests/tcg/aarch64-linux-user/sha512-sve gives: 1..10 ok 1 - do_test(&tests[i]) 0, 0x4007c0, 0xa4004b80, ".byte 0x80, 0x4b, 0x00, 0xa4", load, 0x5500800370, load, 0x5500800371, load, 0x5500800372, load, 0x5500800373, load, 0x5500800374, load, 0x5500800375, load, 0x5500800376, load, 0x5500800377, load, 0x5500800378, load, 0x5500800379, load, 0x550080037a, load, 0x550080037b, load, 0x550080037c, load, 0x550080037d, load, 0x550080037e, load, 0x550080037f, load, 0x5500800380, load, 0x5500800381, load, 0x5500800382, load, 0x5500800383, load, 0x5500800384, load, 0x5500800385, load, 0x5500800386, lo ad, 0x5500800387, load, 0x5500800388, load, 0x5500800389, load, 0x550080038a, load, 0x550080038b, load, 0x550080038c, load, 0x550080038d, load, 0x550080038e, load, 0x550080038f, load, 0x5500800390, load, 0x5500800391, load, 0x5500800392, load, 0x5500800393, load, 0x5500800394, load, 0x5500800395, load, 0x5500800396, load, 0x5500800397, load, 0x5500800398, load, 0x5500800399, load, 0x550080039a, load, 0x550080039b, load, 0x550080039c, load, 0x550080039d, load, 0x550080039e, load, 0x550080039f, load, 0x55008003a0, load, 0x55008003a1, load, 0x55008003a2, load, 0x55008003a3, load, 0x55008003a4, load, 0x55008003a5, load, 0x55008003a6, load, 0x55008003a7, load, 0x55008003a8, load, 0x55008003a9, load, 0x55008003aa, load, 0x55008003ab, load, 0x55008003ac, load, 0x55008003ad, load, 0x55008003ae, load, 0x55008003af (4007c0 is the ld1b in the sha512-sve) Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson Cc: Robert Henry Cc: Aaron Lindsay --- include/exec/cpu-all.h | 2 +- include/hw/core/cpu.h | 17 +++++++++++++++++ accel/tcg/cputlb.c | 4 +++- accel/tcg/user-exec.c | 6 +++++- target/arm/tcg/sve_helper.c | 4 ---- tests/tcg/aarch64/Makefile.target | 8 ++++++++ 6 files changed, 34 insertions(+), 7 deletions(-) diff --git a/include/exec/cpu-all.h b/include/exec/cpu-all.h index 78d258af44..9ab09cf7c2 100644 --- a/include/exec/cpu-all.h +++ b/include/exec/cpu-all.h @@ -301,7 +301,7 @@ CPUArchState *cpu_copy(CPUArchState *env); * be signaled by probe_access_flags(). */ #define TLB_INVALID_MASK (1 << (TARGET_PAGE_BITS_MIN - 1)) -#define TLB_MMIO 0 +#define TLB_MMIO (1 << (TARGET_PAGE_BITS_MIN - 2)) #define TLB_WATCHPOINT 0 #else diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index 39150cf8f8..26fadf7e62 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -983,6 +983,23 @@ void cpu_watchpoint_remove_by_ref(CPUState *cpu, CPUWatchpoint *watchpoint); void cpu_watchpoint_remove_all(CPUState *cpu, int mask); #endif +/** + * cpu_plugin_mem_cbs_enabled() - are plugin memory callbacks enabled? + * @cs: CPUState pointer + * + * The memory callbacks are installed if a plugin has instrumented an + * instruction for memory. This can be useful to know if you want to + * force a slow path for a series of memory accesses. + */ +static inline bool cpu_plugin_mem_cbs_enabled(const CPUState *cpu) +{ +#ifdef CONFIG_PLUGIN + return !!cpu->plugin_mem_cbs; +#else + return false; +#endif +} + /** * cpu_get_address_space: * @cpu: CPU to get address space from diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c index ae0fbcdee2..f117fd8f16 100644 --- a/accel/tcg/cputlb.c +++ b/accel/tcg/cputlb.c @@ -1540,7 +1540,9 @@ static int probe_access_internal(CPUArchState *env, target_ulong addr, *pfull = &env_tlb(env)->d[mmu_idx].fulltlb[index]; /* Fold all "mmio-like" bits into TLB_MMIO. This is not RAM. */ - if (unlikely(flags & ~(TLB_WATCHPOINT | TLB_NOTDIRTY))) { + if (unlikely(flags & ~(TLB_WATCHPOINT | TLB_NOTDIRTY)) + || + (access_type != MMU_INST_FETCH && cpu_plugin_mem_cbs_enabled(env_cpu(env)))) { *phost = NULL; return TLB_MMIO; } diff --git a/accel/tcg/user-exec.c b/accel/tcg/user-exec.c index 36ad8284a5..383263cd1d 100644 --- a/accel/tcg/user-exec.c +++ b/accel/tcg/user-exec.c @@ -745,6 +745,10 @@ static int probe_access_internal(CPUArchState *env, target_ulong addr, if (guest_addr_valid_untagged(addr)) { int page_flags = page_get_flags(addr); if (page_flags & acc_flag) { + if ((acc_flag == PAGE_READ || acc_flag == PAGE_WRITE) + && cpu_plugin_mem_cbs_enabled(env_cpu(env))) { + return TLB_MMIO; + } return 0; /* success */ } maperr = !(page_flags & PAGE_VALID); @@ -767,7 +771,7 @@ int probe_access_flags(CPUArchState *env, target_ulong addr, int size, g_assert(-(addr | TARGET_PAGE_MASK) >= size); flags = probe_access_internal(env, addr, size, access_type, nonfault, ra); - *phost = flags ? NULL : g2h(env_cpu(env), addr); + *phost = (flags & TLB_INVALID_MASK) ? NULL : g2h(env_cpu(env), addr); return flags; } diff --git a/target/arm/tcg/sve_helper.c b/target/arm/tcg/sve_helper.c index 0097522470..7c103fc9f7 100644 --- a/target/arm/tcg/sve_helper.c +++ b/target/arm/tcg/sve_helper.c @@ -5688,9 +5688,6 @@ void sve_ldN_r(CPUARMState *env, uint64_t *vg, const target_ulong addr, flags = info.page[0].flags | info.page[1].flags; if (unlikely(flags != 0)) { -#ifdef CONFIG_USER_ONLY - g_assert_not_reached(); -#else /* * At least one page includes MMIO. * Any bus operation can fail with cpu_transaction_failed, @@ -5727,7 +5724,6 @@ void sve_ldN_r(CPUARMState *env, uint64_t *vg, const target_ulong addr, memcpy(&env->vfp.zregs[(rd + i) & 31], &scratch[i], reg_max); } return; -#endif } /* The entire operation is in RAM, on valid pages. */ diff --git a/tests/tcg/aarch64/Makefile.target b/tests/tcg/aarch64/Makefile.target index 0315795487..f83edd8544 100644 --- a/tests/tcg/aarch64/Makefile.target +++ b/tests/tcg/aarch64/Makefile.target @@ -80,6 +80,14 @@ sha512-vector: sha512.c TESTS += sha512-vector +ifneq ($(CROSS_CC_HAS_SVE),) +sha512-sve: CFLAGS=-O3 -march=armv8.1-a+sve +sha512-sve: sha512.c + $(CC) $(CFLAGS) $(EXTRA_CFLAGS) $< -o $@ $(LDFLAGS) + +TESTS += sha512-sve +endif + ifeq ($(HOST_GDB_SUPPORTS_ARCH),y) GDB_SCRIPT=$(SRC_PATH)/tests/guest-debug/run-test.py