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([2602:ae:1598:4c01:be31:c162:a57e:7431]) by smtp.gmail.com with ESMTPSA id j20-20020a170902759400b001a988a71617sm1258992pll.192.2023.05.27.07.19.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 27 May 2023 07:19:13 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: christoph.muellner@vrull.eu, alex.bennee@linaro.org Subject: [PATCH 2/4] tests/tcg/alpha: Add test for cvttq Date: Sat, 27 May 2023 07:19:08 -0700 Message-Id: <20230527141910.1885950-3-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230527141910.1885950-1-richard.henderson@linaro.org> References: <20230527141910.1885950-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Test for invalid, integer overflow, and inexact. Test for proper result, modulo 2**64. Signed-off-by: Richard Henderson Acked-by: Alex Bennée Acked-by: Alex Bennée --- tests/tcg/alpha/test-cvttq.c | 78 +++++++++++++++++++++++++++++++++ tests/tcg/alpha/Makefile.target | 2 +- 2 files changed, 79 insertions(+), 1 deletion(-) create mode 100644 tests/tcg/alpha/test-cvttq.c diff --git a/tests/tcg/alpha/test-cvttq.c b/tests/tcg/alpha/test-cvttq.c new file mode 100644 index 0000000000..d1ad995312 --- /dev/null +++ b/tests/tcg/alpha/test-cvttq.c @@ -0,0 +1,78 @@ +#include + +#define FPCR_SUM (1UL << 63) +#define FPCR_INED (1UL << 62) +#define FPCR_UNFD (1UL << 61) +#define FPCR_UNDZ (1UL << 60) +#define FPCR_DYN_SHIFT 58 +#define FPCR_DYN_CHOPPED (0UL << FPCR_DYN_SHIFT) +#define FPCR_DYN_MINUS (1UL << FPCR_DYN_SHIFT) +#define FPCR_DYN_NORMAL (2UL << FPCR_DYN_SHIFT) +#define FPCR_DYN_PLUS (3UL << FPCR_DYN_SHIFT) +#define FPCR_DYN_MASK (3UL << FPCR_DYN_SHIFT) +#define FPCR_IOV (1UL << 57) +#define FPCR_INE (1UL << 56) +#define FPCR_UNF (1UL << 55) +#define FPCR_OVF (1UL << 54) +#define FPCR_DZE (1UL << 53) +#define FPCR_INV (1UL << 52) +#define FPCR_OVFD (1UL << 51) +#define FPCR_DZED (1UL << 50) +#define FPCR_INVD (1UL << 49) +#define FPCR_DNZ (1UL << 48) +#define FPCR_DNOD (1UL << 47) +#define FPCR_STATUS_MASK (FPCR_IOV | FPCR_INE | FPCR_UNF \ + | FPCR_OVF | FPCR_DZE | FPCR_INV) + +static long test_cvttq(long *ret_e, double d) +{ + unsigned long reset = (FPCR_INED | FPCR_UNFD | FPCR_OVFD | FPCR_DZED | + FPCR_INVD | FPCR_DYN_NORMAL); + long r, e; + + asm("excb\n\t" + "mt_fpcr %3\n\t" + "excb\n\t" + "cvttq/svic %2, %0\n\t" + "excb\n\t" + "mf_fpcr %1\n\t" + "excb\n\t" + : "=f"(r), "=f"(e) + : "f"(d), "f"(reset)); + + *ret_e = e & FPCR_STATUS_MASK; + return r; +} + +int main (void) +{ + static const struct { + double d; + long r; + long e; + } T[] = { + { 1.0, 1, 0 }, + { -1.0, -1, 0 }, + { 1.5, 1, FPCR_INE }, + { 0x1.0p32, 0x0000000100000000ul, 0 }, + { -0x1.0p63, 0x8000000000000000ul, 0 }, + { 0x1.0p63, 0x8000000000000000ul, FPCR_IOV | FPCR_INE }, + { 0x1.0p64, 0x0000000000000000ul, FPCR_IOV | FPCR_INE }, + { 0x1.cccp64, 0xccc0000000000000ul, FPCR_IOV | FPCR_INE }, + { __builtin_inf(), 0, FPCR_INV }, + { __builtin_nan(""), 0, FPCR_INV }, + }; + + int i, err = 0; + + for (i = 0; i < sizeof(T)/sizeof(T[0]); i++) { + long e, r = test_cvttq(&e, T[i].d); + + if (r != T[i].r || e != T[i].e) { + printf("Fail %a: expect (%016lx : %04lx) got (%016lx : %04lx)\n", + T[i].d, T[i].r, T[i].e >> 48, r, e >> 48); + err = 1; + } + } + return err; +} diff --git a/tests/tcg/alpha/Makefile.target b/tests/tcg/alpha/Makefile.target index a585080328..b94500a7d9 100644 --- a/tests/tcg/alpha/Makefile.target +++ b/tests/tcg/alpha/Makefile.target @@ -5,7 +5,7 @@ ALPHA_SRC=$(SRC_PATH)/tests/tcg/alpha VPATH+=$(ALPHA_SRC) -ALPHA_TESTS=hello-alpha test-cond test-cmov test-ovf +ALPHA_TESTS=hello-alpha test-cond test-cmov test-ovf test-cvttq TESTS+=$(ALPHA_TESTS) test-cmov: EXTRA_CFLAGS=-DTEST_CMOV