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[176.184.10.225]) by smtp.gmail.com with ESMTPSA id i16-20020aa7c9d0000000b0050d83a39e6fsm13235940edt.4.2023.06.19.08.56.47 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 19 Jun 2023 08:56:48 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Richard Henderson , qemu-arm@nongnu.org, Peter Maydell , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Subject: [PATCH v3 24/34] target/arm/tcg: Reduce 'helper-sme.h.inc' inclusion Date: Mon, 19 Jun 2023 17:55:00 +0200 Message-Id: <20230619155510.80991-12-philmd@linaro.org> X-Mailer: git-send-email 2.38.1 In-Reply-To: <20230619155510.80991-1-philmd@linaro.org> References: <20230619154302.80350-1-philmd@linaro.org> <20230619155510.80991-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::533; envelope-from=philmd@linaro.org; helo=mail-ed1-x533.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Instead of including helper-sme.h.inc via helper.h which is included by all TCG files, restrict it to the few files that require it. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson --- target/arm/helper.h | 1 - target/arm/tcg/sme_helper.c | 5 ++++- target/arm/tcg/translate-a64.c | 4 ++++ target/arm/tcg/translate-sme.c | 6 ++++++ 4 files changed, 14 insertions(+), 2 deletions(-) diff --git a/target/arm/helper.h b/target/arm/helper.h index 6ea6384855..159ed9664f 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -113,5 +113,4 @@ DEF_HELPER_FLAGS_3(crc32c, TCG_CALL_NO_RWG_SE, i32, i32, i32, i32) #ifdef TARGET_AARCH64 #include "tcg/helper-a64.h.inc" -#include "tcg/helper-sme.h.inc" #endif diff --git a/target/arm/tcg/sme_helper.c b/target/arm/tcg/sme_helper.c index 1e67fcac30..04170ad18d 100644 --- a/target/arm/tcg/sme_helper.c +++ b/target/arm/tcg/sme_helper.c @@ -21,7 +21,6 @@ #include "cpu.h" #include "internals.h" #include "tcg/tcg-gvec-desc.h" -#include "exec/helper-proto.h" #include "exec/cpu_ldst.h" #include "exec/exec-all.h" #include "qemu/int128.h" @@ -29,6 +28,10 @@ #include "vec_internal.h" #include "sve_ldst_internal.h" +#define HELPER_H "tcg/helper-sme.h.inc" +#include "exec/helper-proto.h.inc" +#undef HELPER_H + void helper_set_svcr(CPUARMState *env, uint32_t val, uint32_t mask) { aarch64_set_svcr(env, val, mask); diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 46428ef034..f4c9448582 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -42,6 +42,10 @@ #include "exec/helper-gen.h.inc" #undef HELPER_H +#define HELPER_H "tcg/helper-sme.h.inc" +#include "exec/helper-gen.h.inc" +#undef HELPER_H + static TCGv_i64 cpu_X[32]; static TCGv_i64 cpu_pc; diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c index e63b9883a9..fa0dc20bf2 100644 --- a/target/arm/tcg/translate-sme.c +++ b/target/arm/tcg/translate-sme.c @@ -29,6 +29,12 @@ #include "exec/helper-gen.h.inc" #undef HELPER_H +#define HELPER_H "tcg/helper-sme.h.inc" +#include "exec/helper-proto.h.inc" +#include "exec/helper-gen.h.inc" +#include "exec/helper-info.c.inc" +#undef HELPER_H + /* * Include the generated decoder. */