From patchwork Tue Jun 20 11:07:28 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 694458 Delivered-To: patch@linaro.org Received: by 2002:adf:e885:0:0:0:0:0 with SMTP id d5csp244495wrm; Tue, 20 Jun 2023 04:10:25 -0700 (PDT) X-Google-Smtp-Source: ACHHUZ6r0WYDAn98AYvlbMe863/yiP8hAtnTw8KbmvCV0r4U40CKvWQhOeZMHFgZviwSGRMa61nj X-Received: by 2002:a05:6214:1c85:b0:621:265e:f726 with SMTP id ib5-20020a0562141c8500b00621265ef726mr11736385qvb.43.1687259425457; Tue, 20 Jun 2023 04:10:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1687259425; cv=none; d=google.com; s=arc-20160816; b=i0UcP5KB9/h0R5mDPnCZOxB+OFkyoZjMjaNIsYjb3jsgj2sz5tyxPGALf74RevjUbi qIywt7gf00bxqgq1/huuB5mvDKx8Qh/jlL9A7qqCTEhErZ+8t6+BSi2+jHboB5vMERrw 5lB1i44UGSaG/CcIGZENSxvg2S9OxBBIyDfqOBu+6gcGa+99IA9zyqtAbL1q/QOGUIe0 Ont/jWr19alB4ek2GQCxxEd6/O1LBVkyzmZsQzT3r2/xXDAvtakNSX5EfiKESTlHpI/5 rfOiNJeETEqG2o1mcFmitHfe8lZ3tOSo7daK67OcXqaZA7Uh7IvTwYQoH8DsOzZiX70j 9fSg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=24csfVfVB/om++z3Dw6ZmC6sozEjrnY9D1BEg+uRKMI=; b=JBCB15U+FdCW1wL6YMjThYFxj9mTKamKNmBp58PIpw6sm/QgmGdGYIJHQuNoZj6OSe px3MA2Sc8bYWH8oOaFhEVt8hUuEbtxyPzKBwMc+++H9VGJsoT8Et/skXPlP8ly3dF4kA liHvqI2BtjatR1C0SdgjUbzY8yaeWJQPCCo6Mixs7p+wDUsikM3nQe9la1njMHZ7Mny0 2jveCi2ee9PAHjr6uaOajitYTbpiaZXRVy5wIXM5rX22vaGU3RZ/lpz//JCMQpH1ETfl 0MsGiljW/nRN24Q5ZHZfsW+x1Yje+atAvBOY5Now+1DS4kZj/kPzJKCeQ/x/xabERZ3D yPmQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ep1i8g4U; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id r4-20020a0562140c8400b006260a17e37bsi730942qvr.132.2023.06.20.04.10.25 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 20 Jun 2023 04:10:25 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ep1i8g4U; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1qBZDf-00063J-W1; Tue, 20 Jun 2023 07:08:20 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1qBZDd-0005yj-Oh for qemu-devel@nongnu.org; Tue, 20 Jun 2023 07:08:17 -0400 Received: from mail-ed1-x529.google.com ([2a00:1450:4864:20::529]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1qBZDY-0004DU-VK for qemu-devel@nongnu.org; Tue, 20 Jun 2023 07:08:17 -0400 Received: by mail-ed1-x529.google.com with SMTP id 4fb4d7f45d1cf-5189f49c315so4819752a12.2 for ; Tue, 20 Jun 2023 04:08:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; t=1687259291; x=1689851291; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=24csfVfVB/om++z3Dw6ZmC6sozEjrnY9D1BEg+uRKMI=; b=Ep1i8g4UXYmNDu8Ua1ZGPGqRdJjXE9ba65yIErdiSR9vv+IIYadkDn+xbfi5nTGV5+ Ug7yBvqLZTlWRPr6vRC1LudeYNbvhVf9Y0BqWNRYgee0Ue3YhMJuGbQHx+XE87KZqQWs dkAW3WvEMQzRRshYDj5utDpLklu7coDNJ9Xk6xQsKA/mEM+ef3uuYb+arHRoLjEJZ31r AXFwtl4rqGhLpVQXMeC0oPUfzRuV/9V8j/XUavqnRw+dNhu+qzOT2jNV4HeuNSyWyFPd wH9QOECioRjBCWkjUX8swqyHhsEIpOb5wzuOUt/sbWH+UHTRmz6aVvW3HSvPWT8ETBSz 8BCQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1687259291; x=1689851291; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=24csfVfVB/om++z3Dw6ZmC6sozEjrnY9D1BEg+uRKMI=; b=SX2Wrmls9yH2ew2s2NUaJBkfMKnwXB8PqieGabDTJSwknGA6IKzQKpHGBJgMew4t8w GoST6Glo3dtEvBHVdSMNG4jQXMeoJgqbvveD4pXpu/HS+5ArWnq/W73AcDeln9IuM0hJ eCzceb5u4a85vlNYvDywu/g2sNW3KCucPXM05qtXXWMy59LOhYLc4712Tq1zCyQ1j9ZM DHkGCEC0pK0ebbfQk0On+5J1d+zKnTEdLOt+CfC6jZ4EeoQP2j1I0idgL/Rm256ioQVv jDNNayPCjAvrfOsWymBJ47tsilbml1MVIFGshnNYpneb3hnmlNjqZs3LdMaqzLi4wOin dQEA== X-Gm-Message-State: AC+VfDxQBeA5IIfVuFbkpke6TrOIK4oPbJLFPzhuwzEUVHOpVMYbgwVn Rs6BS2i2CkEv9TQJAhKkL3DFugWKS1Y+kieYhdvUUfHW X-Received: by 2002:a17:907:3189:b0:974:2169:5f81 with SMTP id xe9-20020a170907318900b0097421695f81mr10493104ejb.22.1687259291599; Tue, 20 Jun 2023 04:08:11 -0700 (PDT) Received: from stoup.lan ([176.176.183.29]) by smtp.gmail.com with ESMTPSA id x17-20020a170906711100b009884f015a44sm1170687ejj.49.2023.06.20.04.08.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 20 Jun 2023 04:08:11 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Cc: berrange@redhat.com, qemu-ppc@nongnu.org, qemu-arm@nongnu.org, qemu-riscv@nongnu.org, =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= Subject: [PATCH v3 07/37] target/arm: Demultiplex AESE and AESMC Date: Tue, 20 Jun 2023 13:07:28 +0200 Message-Id: <20230620110758.787479-8-richard.henderson@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230620110758.787479-1-richard.henderson@linaro.org> References: <20230620110758.787479-1-richard.henderson@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::529; envelope-from=richard.henderson@linaro.org; helo=mail-ed1-x529.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org Split these helpers so that we are not passing 'decrypt' within the simd descriptor. Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Richard Henderson --- target/arm/helper.h | 2 ++ target/arm/tcg/sve.decode | 4 ++-- target/arm/tcg/crypto_helper.c | 37 +++++++++++++++++++++++---------- target/arm/tcg/translate-a64.c | 13 ++++-------- target/arm/tcg/translate-neon.c | 4 ++-- target/arm/tcg/translate-sve.c | 8 ++++--- 6 files changed, 41 insertions(+), 27 deletions(-) diff --git a/target/arm/helper.h b/target/arm/helper.h index 3335c2b10b..95e32a697a 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -552,7 +552,9 @@ DEF_HELPER_FLAGS_2(neon_qzip16, TCG_CALL_NO_RWG, void, ptr, ptr) DEF_HELPER_FLAGS_2(neon_qzip32, TCG_CALL_NO_RWG, void, ptr, ptr) DEF_HELPER_FLAGS_4(crypto_aese, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) +DEF_HELPER_FLAGS_4(crypto_aesd, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_3(crypto_aesmc, TCG_CALL_NO_RWG, void, ptr, ptr, i32) +DEF_HELPER_FLAGS_3(crypto_aesimc, TCG_CALL_NO_RWG, void, ptr, ptr, i32) DEF_HELPER_FLAGS_4(crypto_sha1su0, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) DEF_HELPER_FLAGS_4(crypto_sha1c, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32) diff --git a/target/arm/tcg/sve.decode b/target/arm/tcg/sve.decode index 14b3a69c36..04b6fcc0cf 100644 --- a/target/arm/tcg/sve.decode +++ b/target/arm/tcg/sve.decode @@ -1629,8 +1629,8 @@ STNT1_zprz 1110010 .. 10 ..... 001 ... ..... ..... \ ### SVE2 Crypto Extensions # SVE2 crypto unary operations -# AESMC and AESIMC -AESMC 01000101 00 10000011100 decrypt:1 00000 rd:5 +AESMC 01000101 00 10000011100 0 00000 rd:5 +AESIMC 01000101 00 10000011100 1 00000 rd:5 # SVE2 crypto destructive binary operations AESE 01000101 00 10001 0 11100 0 ..... ..... @rdn_rm_e0 diff --git a/target/arm/tcg/crypto_helper.c b/target/arm/tcg/crypto_helper.c index 06254939d2..75882d9ea3 100644 --- a/target/arm/tcg/crypto_helper.c +++ b/target/arm/tcg/crypto_helper.c @@ -45,11 +45,9 @@ static void clear_tail_16(void *vd, uint32_t desc) clear_tail(vd, opr_sz, max_sz); } -static void do_crypto_aese(uint64_t *rd, uint64_t *rn, - uint64_t *rm, bool decrypt) +static void do_crypto_aese(uint64_t *rd, uint64_t *rn, uint64_t *rm, + const uint8_t *sbox, const uint8_t *shift) { - static uint8_t const * const sbox[2] = { AES_sbox, AES_isbox }; - static uint8_t const * const shift[2] = { AES_shifts, AES_ishifts }; union CRYPTO_STATE rk = { .l = { rm[0], rm[1] } }; union CRYPTO_STATE st = { .l = { rn[0], rn[1] } }; int i; @@ -60,7 +58,7 @@ static void do_crypto_aese(uint64_t *rd, uint64_t *rn, /* combine ShiftRows operation and sbox substitution */ for (i = 0; i < 16; i++) { - CR_ST_BYTE(st, i) = sbox[decrypt][CR_ST_BYTE(rk, shift[decrypt][i])]; + CR_ST_BYTE(st, i) = sbox[CR_ST_BYTE(rk, shift[i])]; } rd[0] = st.l[0]; @@ -70,18 +68,26 @@ static void do_crypto_aese(uint64_t *rd, uint64_t *rn, void HELPER(crypto_aese)(void *vd, void *vn, void *vm, uint32_t desc) { intptr_t i, opr_sz = simd_oprsz(desc); - bool decrypt = simd_data(desc); for (i = 0; i < opr_sz; i += 16) { - do_crypto_aese(vd + i, vn + i, vm + i, decrypt); + do_crypto_aese(vd + i, vn + i, vm + i, AES_sbox, AES_shifts); } clear_tail(vd, opr_sz, simd_maxsz(desc)); } -static void do_crypto_aesmc(uint64_t *rd, uint64_t *rm, bool decrypt) +void HELPER(crypto_aesd)(void *vd, void *vn, void *vm, uint32_t desc) +{ + intptr_t i, opr_sz = simd_oprsz(desc); + + for (i = 0; i < opr_sz; i += 16) { + do_crypto_aese(vd + i, vn + i, vm + i, AES_isbox, AES_ishifts); + } + clear_tail(vd, opr_sz, simd_maxsz(desc)); +} + +static void do_crypto_aesmc(uint64_t *rd, uint64_t *rm, const uint32_t *mc) { union CRYPTO_STATE st = { .l = { rm[0], rm[1] } }; - const uint32_t *mc = decrypt ? AES_imc_rot : AES_mc_rot; int i; for (i = 0; i < 16; i += 4) { @@ -99,10 +105,19 @@ static void do_crypto_aesmc(uint64_t *rd, uint64_t *rm, bool decrypt) void HELPER(crypto_aesmc)(void *vd, void *vm, uint32_t desc) { intptr_t i, opr_sz = simd_oprsz(desc); - bool decrypt = simd_data(desc); for (i = 0; i < opr_sz; i += 16) { - do_crypto_aesmc(vd + i, vm + i, decrypt); + do_crypto_aesmc(vd + i, vm + i, AES_mc_rot); + } + clear_tail(vd, opr_sz, simd_maxsz(desc)); +} + +void HELPER(crypto_aesimc)(void *vd, void *vm, uint32_t desc) +{ + intptr_t i, opr_sz = simd_oprsz(desc); + + for (i = 0; i < opr_sz; i += 16) { + do_crypto_aesmc(vd + i, vm + i, AES_imc_rot); } clear_tail(vd, opr_sz, simd_maxsz(desc)); } diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c index 3baab6aa60..7d0c8f79a7 100644 --- a/target/arm/tcg/translate-a64.c +++ b/target/arm/tcg/translate-a64.c @@ -13210,7 +13210,6 @@ static void disas_crypto_aes(DisasContext *s, uint32_t insn) int opcode = extract32(insn, 12, 5); int rn = extract32(insn, 5, 5); int rd = extract32(insn, 0, 5); - int decrypt; gen_helper_gvec_2 *genfn2 = NULL; gen_helper_gvec_3 *genfn3 = NULL; @@ -13221,20 +13220,16 @@ static void disas_crypto_aes(DisasContext *s, uint32_t insn) switch (opcode) { case 0x4: /* AESE */ - decrypt = 0; genfn3 = gen_helper_crypto_aese; break; case 0x6: /* AESMC */ - decrypt = 0; genfn2 = gen_helper_crypto_aesmc; break; case 0x5: /* AESD */ - decrypt = 1; - genfn3 = gen_helper_crypto_aese; + genfn3 = gen_helper_crypto_aesd; break; case 0x7: /* AESIMC */ - decrypt = 1; - genfn2 = gen_helper_crypto_aesmc; + genfn2 = gen_helper_crypto_aesimc; break; default: unallocated_encoding(s); @@ -13245,9 +13240,9 @@ static void disas_crypto_aes(DisasContext *s, uint32_t insn) return; } if (genfn2) { - gen_gvec_op2_ool(s, true, rd, rn, decrypt, genfn2); + gen_gvec_op2_ool(s, true, rd, rn, 0, genfn2); } else { - gen_gvec_op3_ool(s, true, rd, rd, rn, decrypt, genfn3); + gen_gvec_op3_ool(s, true, rd, rd, rn, 0, genfn3); } } diff --git a/target/arm/tcg/translate-neon.c b/target/arm/tcg/translate-neon.c index 03913de047..8de4ceb203 100644 --- a/target/arm/tcg/translate-neon.c +++ b/target/arm/tcg/translate-neon.c @@ -3451,9 +3451,9 @@ static bool trans_VMVN(DisasContext *s, arg_2misc *a) } WRAP_2M_3_OOL_FN(gen_AESE, gen_helper_crypto_aese, 0) -WRAP_2M_3_OOL_FN(gen_AESD, gen_helper_crypto_aese, 1) +WRAP_2M_3_OOL_FN(gen_AESD, gen_helper_crypto_aesd, 0) WRAP_2M_2_OOL_FN(gen_AESMC, gen_helper_crypto_aesmc, 0) -WRAP_2M_2_OOL_FN(gen_AESIMC, gen_helper_crypto_aesmc, 1) +WRAP_2M_2_OOL_FN(gen_AESIMC, gen_helper_crypto_aesimc, 0) WRAP_2M_2_OOL_FN(gen_SHA1H, gen_helper_crypto_sha1h, 0) WRAP_2M_2_OOL_FN(gen_SHA1SU1, gen_helper_crypto_sha1su1, 0) WRAP_2M_2_OOL_FN(gen_SHA256SU0, gen_helper_crypto_sha256su0, 0) diff --git a/target/arm/tcg/translate-sve.c b/target/arm/tcg/translate-sve.c index ff050626e6..b98f469cb1 100644 --- a/target/arm/tcg/translate-sve.c +++ b/target/arm/tcg/translate-sve.c @@ -7151,12 +7151,14 @@ TRANS_FEAT(USDOT_zzzz, aa64_sve_i8mm, gen_gvec_ool_arg_zzzz, a->esz == 2 ? gen_helper_gvec_usdot_b : NULL, a, 0) TRANS_FEAT_NONSTREAMING(AESMC, aa64_sve2_aes, gen_gvec_ool_zz, - gen_helper_crypto_aesmc, a->rd, a->rd, a->decrypt) + gen_helper_crypto_aesmc, a->rd, a->rd, 0) +TRANS_FEAT_NONSTREAMING(AESIMC, aa64_sve2_aes, gen_gvec_ool_zz, + gen_helper_crypto_aesimc, a->rd, a->rd, 0) TRANS_FEAT_NONSTREAMING(AESE, aa64_sve2_aes, gen_gvec_ool_arg_zzz, - gen_helper_crypto_aese, a, false) + gen_helper_crypto_aese, a, 0) TRANS_FEAT_NONSTREAMING(AESD, aa64_sve2_aes, gen_gvec_ool_arg_zzz, - gen_helper_crypto_aese, a, true) + gen_helper_crypto_aesd, a, 0) TRANS_FEAT_NONSTREAMING(SM4E, aa64_sve2_sm4, gen_gvec_ool_arg_zzz, gen_helper_crypto_sm4e, a, 0)