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[212.78.193.212]) by smtp.gmail.com with ESMTPSA id ec31-20020a0564020d5f00b00530a9488623sm4149603edb.46.2023.09.18.09.04.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Mon, 18 Sep 2023 09:04:28 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Cc: Laurent Vivier , Paolo Bonzini , Max Filippov , David Hildenbrand , Peter Xu , Anton Johansson , Peter Maydell , kvm@vger.kernel.org, Marek Vasut , David Gibson , Brian Cain , Yoshinori Sato , "Edgar E . Iglesias" , Claudio Fontana , Daniel Henrique Barboza , Artyom Tarasenko , Marcelo Tosatti , qemu-ppc@nongnu.org, Liu Zhiwei , Aurelien Jarno , Ilya Leoshkevich , Daniel Henrique Barboza , Bastian Koppelmann , =?utf-8?q?C=C3=A9dric_?= =?utf-8?q?Le_Goater?= , Alistair Francis , Alessandro Di Federico , Song Gao , Marcel Apfelbaum , Chris Wulff , "Michael S. Tsirkin" , Alistair Francis , Fabiano Rosas , qemu-s390x@nongnu.org, Yanan Wang , Luc Michel , Weiwei Li , Bin Meng , Stafford Horne , Xiaojuan Yang , "Daniel P . Berrange" , Thomas Huth , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , qemu-arm@nongnu.org, Jiaxun Yang , Richard Henderson , Aleksandar Rikalo , Bernhard Beschow , Mark Cave-Ayland , qemu-riscv@nongnu.org, =?utf-8?q?Alex_Benn=C3=A9e?= , Nicholas Piggin , Greg Kurz , Michael Rolnik , Eduardo Habkost , Markus Armbruster , Palmer Dabbelt Subject: [PATCH 17/22] target/i386: Extract verify_accel_features() from cpu_realize() Date: Mon, 18 Sep 2023 18:02:50 +0200 Message-ID: <20230918160257.30127-18-philmd@linaro.org> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20230918160257.30127-1-philmd@linaro.org> References: <20230918160257.30127-1-philmd@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::133; envelope-from=philmd@linaro.org; helo=mail-lf1-x133.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: qemu-devel-bounces+patch=linaro.org@nongnu.org When looking at the x86_cpu_realizefn() method, most of the code run before the cpu_exec_realizefn() call checks whether the requested CPU features are compatible with the requested accelerator. Extract this code to a dedicated handler matching our recently added CPUClass::verify_accel_features() handler. Signed-off-by: Philippe Mathieu-Daudé --- target/i386/cpu.c | 62 +++++++++++++++++++++++++++-------------------- 1 file changed, 36 insertions(+), 26 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index d79797d963..2884733397 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -7208,26 +7208,19 @@ static void x86_cpu_hyperv_realize(X86CPU *cpu) cpu->hyperv_limits[2] = 0; } -static void x86_cpu_realizefn(DeviceState *dev, Error **errp) +/* + * note: the call to the framework needs to happen after feature expansion, + * but before the checks/modifications to ucode_rev, mwait, phys_bits. + * These may be set by the accel-specific code, + * and the results are subsequently checked / assumed in x86_cpu_realizefn(). + */ +static bool x86_cpu_verify_accel_features(CPUState *cs, Error **errp) { - CPUState *cs = CPU(dev); - X86CPU *cpu = X86_CPU(dev); - X86CPUClass *xcc = X86_CPU_GET_CLASS(dev); + X86CPU *cpu = X86_CPU(cs); CPUX86State *env = &cpu->env; Error *local_err = NULL; - static bool ht_warned; unsigned requested_lbr_fmt; - /* Use pc-relative instructions in system-mode */ -#ifndef CONFIG_USER_ONLY - cs->tcg_cflags |= CF_PCREL; -#endif - - if (cpu->apic_id == UNASSIGNED_APIC_ID) { - error_setg(errp, "apic-id property was not initialized properly"); - return; - } - /* * Process Hyper-V enlightenments. * Note: this currently has to happen before the expansion of CPU features. @@ -7236,7 +7229,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) x86_cpu_expand_features(cpu, &local_err); if (local_err) { - goto out; + return false; } /* @@ -7246,7 +7239,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) if (cpu->lbr_fmt != ~PERF_CAP_LBR_FMT) { if ((cpu->lbr_fmt & PERF_CAP_LBR_FMT) != cpu->lbr_fmt) { error_setg(errp, "invalid lbr-fmt"); - return; + return false; } env->features[FEAT_PERF_CAPABILITIES] &= ~PERF_CAP_LBR_FMT; env->features[FEAT_PERF_CAPABILITIES] |= cpu->lbr_fmt; @@ -7265,13 +7258,13 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) if (!cpu->enable_pmu) { error_setg(errp, "vPMU: LBR is unsupported without pmu=on"); - return; + return false; } if (requested_lbr_fmt != host_lbr_fmt) { error_setg(errp, "vPMU: the lbr-fmt value (0x%x) does not match " "the host value (0x%x).", requested_lbr_fmt, host_lbr_fmt); - return; + return false; } } @@ -7282,7 +7275,7 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) accel_uses_host_cpuid() ? "Host doesn't support requested features" : "TCG doesn't support requested features"); - goto out; + return false; } /* On AMD CPUs, some CPUID[8000_0001].EDX bits must match the bits on @@ -7296,12 +7289,28 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) x86_cpu_set_sgxlepubkeyhash(env); - /* - * note: the call to the framework needs to happen after feature expansion, - * but before the checks/modifications to ucode_rev, mwait, phys_bits. - * These may be set by the accel-specific code, - * and the results are subsequently checked / assumed in this function. - */ + return true; +} + +static void x86_cpu_realizefn(DeviceState *dev, Error **errp) +{ + CPUState *cs = CPU(dev); + X86CPU *cpu = X86_CPU(dev); + X86CPUClass *xcc = X86_CPU_GET_CLASS(dev); + CPUX86State *env = &cpu->env; + Error *local_err = NULL; + static bool ht_warned; + + /* Use pc-relative instructions in system-mode */ +#ifndef CONFIG_USER_ONLY + cs->tcg_cflags |= CF_PCREL; +#endif + + if (cpu->apic_id == UNASSIGNED_APIC_ID) { + error_setg(errp, "apic-id property was not initialized properly"); + return; + } + cpu_exec_realizefn(cs, &local_err); if (local_err != NULL) { error_propagate(errp, local_err); @@ -7950,6 +7959,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data) cc->class_by_name = x86_cpu_class_by_name; cc->parse_features = x86_cpu_parse_featurestr; + cc->verify_accel_features = x86_cpu_verify_accel_features; cc->has_work = x86_cpu_has_work; cc->dump_state = x86_cpu_dump_state; cc->set_pc = x86_cpu_set_pc;